ATA6622.pdf 데이터시트 (총 30 페이지) - 파일 다운로드 ATA6622 데이타시트 다운로드

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Features
Master and Slave Operation Possible
Supply Voltage up to 40V
Operating voltage VS = 5V to 27V
Typically 10µA Supply Current During Sleep Mode
Typically 57µA Supply Current in Silent Mode
Linear Low-drop Voltage Regulator, 85mA Current Capability:
– Normal, Fail-safe, and Silent Mode
– Atmel ATA6622 VCC = 3.3V ±2%
– Atmel ATA6624 VCC = 5.0V ±2%
– Atmel ATA6626 VCC = 5.0V ±2%, TXD Time-out Timer Disabled
– In Sleep Mode VCC is Switched Off
VCC- Undervoltage Detection (4ms Reset Time) and Watchdog Reset Logical
Combined at Open Drain Output NRES
Negative Trigger Input for Watchdog
Boosting the Voltage Regulator Possible with an External NPN Transistor
LIN Physical Layer According to LIN 2.0, 2.1 and SAEJ2602-2
Wake-up Capability via LIN-bus, Wake Pin, or Kl_15 Pin
INH Output to Control an External Voltage Regulator or to Switch off the Master Pull Up
Resistor
TXD Time-out Timer; Atmel ATA6626: TXD Time-out Timer Is Disabled
Bus Pin is Overtemperature and Short Circuit Protected versus GND and Battery
Adjustable Watchdog Time via External Resistor
Advanced EMC and ESD Performance
Fulfills the OEM “Hardware Requirements for LIN in automotive Applications Rev.1.0”
Interference and Damage Protection According ISO7637
Package: QFN 5mm × 5mm with 20 Pins
1. Description
The Atmel® ATA6622 is a fully integrated LIN transceiver, which complies with the LIN
2.0, 2.1 and SAEJ2602-2 specifications. It has a low-drop voltage regulator for
3.3V/85mA output and a window watchdog. The Atmel ATA6624 has the same func-
tionality as the Atmel ATA6622; however, it uses a 5V/85mA regulator. The Atmel
ATA6626 has the same functionality as Atmel ATA6624 without a TXD time-out timer.
The voltage regulator is able to source 85mA, but the output current can be boosted
by using an external NPN transistor. This chip combination makes it possible to
develop inexpensive, simple, yet powerful slave and master nodes for LIN-bus sys-
tems. Atmel ATA6622/ATA6624/ATA6626 are designed to handle the low-speed data
communication in vehicles, e.g., in convenience electronics. Improved slope control at
the LIN-driver ensures secure data communication up to 20kBaud. Sleep Mode and
Silent Mode guarantee very low current consumption. The Atmel ATA6626 is able to
switch the LIN unlimited to dominant level via TXD for low data rates.
LIN Bus
Transceiver
with 3.3V (5V)
Regulator and
Watchdog
ATA6622
ATA6624
ATA6626
ATA6622C
ATA6624C
ATA6626C
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Figure 1-1. Block Diagram
10
INH
9
RXD
WAKE
KL_15
4
16
PVCC
11
TXD
1
EN
PVCC
Normal and
Fail-safe
Mode
Edge
Detection
TXD
Time-out
Timer
*)
Receiver
-
+
Wake-up
Bus Timer
Slew Rate Control
Normal
Mode
RF Filter
Short Circuit and
Overtemperature
Protection
Control Unit
Normal/Silent/
Fail-safe Mode
3.3/5V
Undervoltage
Reset
20
VS
7
LIN
19
VCC
18
PVCC
12
NRES
5
GND
*) Not in ATA6626
Internal Testing
Unit
15 14
MODE TM
OUT
Watchdog
PVCC
3
NTRIG
Adjustable
Watchdog
Oscillator
13
WD_OSC
2 Atmel ATA6622/ATA6624/ATA6626
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2. Pin Configuration
Figure 2-1. Pinning QFN20
Atmel ATA6622/ATA6624/ATA6626
20 19 18 17 16
EN
GND
NTRIG
WAKE
GND
1
2
3
4
5
ATA6622/24/26
QFN 5 mm × 5 mm
0.65 mm pitch
20 lead
15 MODE
14 TM
13 WD_OSC
12 NRES
11 TXD
6 7 8 9 10
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Backside
Pin Description
Symbol Function
EN Enables the device in Normal Mode
GND
System ground (optional)
NTRIG Low-level watchdog trigger input from microcontroller
WAKE High-voltage input for local wake-up request; if not needed, connect directly to VS
GND
System ground (mandatory)
GND
System ground (optional)
LIN LIN-bus line input/output
GND
System ground (optional)
RXD
Receive data output
INH Battery related output for controlling an external voltage regulator
TXD
Transmit data input; active low output (strong pull down) after a local wake-up request
NRES Output undervoltage and watchdog reset (open drain)
WD_OSC External resistor for adjustable watchdog timing
TM For factory testing only (tie to ground)
MODE Low, watchdog is on; high, watchdog is off; if not needed, connect to GND
KL_15 Ignition detection (edge sensitive)
GND
System ground (optional)
PVCC 3.3V/5V regulator sense input pin
VCC
3.3V/5V regulator output/driver pin
VS Battery supply
Heat slug is connected to all GND pins
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3. Functional Description
3.1 Physical Layer Compatibility
Since the LIN physical layer is independent from higher LIN layers (e.g., the LIN protocol
layer), all nodes with a LIN physical layer according to revision 2.x can be mixed with LIN
physical layer nodes, which, according to older versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN
1.3), are without any restrictions.
3.2 Supply Pin (VS)
The LIN operating voltage is VS = 5V to 27V. An undervoltage detection is implemented to
disable data transmission if VS falls below VSth < 4V in order to avoid false bus messages.
After switching on VS, the IC starts in Fail-safe Mode, and the voltage regulator is switched on.
The supply current is typically 10µA in Sleep Mode and 57µA in Silent Mode.
3.3 Ground Pin (GND)
The IC does not affect the LIN Bus in the event of GND disconnection. It is able to handle a
ground shift up to 11.5% of VS. The mandatory system ground is pin 5.
3.4 Voltage Regulator Output Pin (VCC)
The internal 3.3V/5V voltage regulator is capable of driving loads up to 85mA. It is able to sup-
ply the microcontroller and other ICs on the PCB and is protected against overloads by means
of current limitation and overtemperature shut-down. Furthermore, the output voltage is moni-
tored and will cause a reset signal at the NRES output pin if it drops below a defined threshold
Vthun. To boost up the maximum load current, an external NPN transistor may be used, with its
base connected to the VCC pin and its emitter connected to PVCC.
3.5 Voltage Regulator Sense Pin (PVCC)
The PVCC is the sense input pin of the 3.3V/5V voltage regulator. For normal applications
(i.e., when only using the internal output transistor), this pin is connected to the VCC pin. If an
external boosting transistor is used, the PVCC pin must be connected to the output of this
transistor, i.e., its emitter terminal.
3.6 Bus Pin (LIN)
A low-side driver with internal current limitation and thermal shutdown and an internal pull-up
resistor compliant with the LIN 2.x specification are implemented. The allowed voltage range
is between –27V and +40V. Reverse currents from the LIN bus to VS are suppressed, even in
the event of GND shifts or battery disconnection. LIN receiver thresholds are compatible with
the LIN protocol specification. The fall time from recessive to dominant bus state and the rise
time from dominant to recessive bus state are slope controlled.
4 Atmel ATA6622/ATA6624/ATA6626
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Atmel ATA6622/ATA6624/ATA6626
3.7 Input/Output Pin (TXD)
In Normal Mode the TXD pin is the microcontroller interface used to control the state of the LIN
output. TXD must be pulled to ground in order to have a low LIN-bus. If TXD is high or uncon-
nected (internal pull-up resistor), the LIN output transistor is turned off, and the bus is in
recessive state. During Fail-safe Mode, this pin is used as output. It is current-limited to <
8mA. and is latched to low if the last wake-up event was from pin WAKE or KL_15.
3.8 TXD Dominant Time-out Function
The TXD input has an internal pull-up resistor. An internal timer prevents the bus line from
being driven permanently in dominant state. If TXD is forced to low for longer than tDOM > 6ms,
the LIN-bus driver is switched to recessive state.
To reactivate the LIN bus driver, switch TXD to high (> 10µs).
The time-out function is disabled in the ATA6626. Switching to dominant level on the LIN bus
occurs without any time limitations.
3.9 Output Pin (RXD)
This output pin reports the state of the LIN-bus to the microcontroller. LIN high (recessive
state) is reported by a high level at RXD; LIN low (dominant state) is reported by a low level at
RXD. The output has an internal pull-up resistor with typically 5kΩ to VCC. The AC character-
istics can be defined with an external load capacitor of 20pF.
The output is short-circuit protected. RXD is switched off in Unpowered Mode (i.e., VS = 0V).
3.10
Enable Input Pin (EN)
The Enable Input pin controls the operation mode of the device. If EN is high, the circuit is in
Normal Mode, with transmission paths from TXD to LIN and from LIN to RXD both active. The
VCC voltage regulator operates with 3.3V/5V/85mA output capability.
If EN is switched to low while TXD is still high, the device is forced to Silent Mode. No data
transmission is then possible, and the current consumption is reduced to IVS typ. 57µA. The
VCC regulator has its full functionality.
If EN is switched to low while TXD is low, the device is forced to Sleep Mode. No data trans-
mission is possible, and the voltage regulator is switched off.
3.11
Wake Input Pin (WAKE)
The Wake Input pin is a high-voltage input used to wake up the device from Sleep Mode or
Silent Mode. It is usually connected to an external switch in the application to generate a local
wake-up. A pull-up current source, typically 10µA, is implemented.
If a local wake-up is not needed in the application, connect the Wake pin directly to the VS pin.
3.12
Mode Input Pin (MODE)
Connect the MODE pin directly or via an external resistor to GND for normal watchdog opera-
tion. To debug the software of the connected microcontroller, connect MODE pin to 3.3V/5V
and the watchdog is switched off.
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