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®
Data Sheet
December 7, 2007
ISL6443A
FN6600.1
300kHz Dual, 180° Out-of-Phase, Step-Down
PWM and Single Linear Controller
www.TdahteasIhSeLe6t44u4.3coAmis a high-performance, triple-output controller
optimized for converting wall adapter, battery or network
intermediate bus DC input supplies into the system supply
voltages required for a wide variety of applications. Each
output is adjustable down to 0.8V. The two PWMs are
synchronized at 180° out of phase, thus reducing the RMS
input current and ripple voltage.
The ISL6443A incorporates several protection features. An
adjustable overcurrent protection circuit monitors the output
current by sensing the voltage drop across the lower
MOSFET. Hiccup mode overcurrent operation protects the
DC/DC components from damage during output
overload/short circuit conditions. Each PWM has an
independent logic-level shutdown input (SD1 and SD2).
A single PGOOD signal is issued when soft-start is complete
on both PWM controllers and their outputs are within 10% of
the set point and the linear regulator output is greater than
75% of its setpoint. Thermal shutdown circuitry turns off the
device if the junction temperature exceeds +150°C.
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE
(°C)
PKG.
PACKAGE DWG. #
ISL6443AIRZ* 6443A IRZ -40 to +85 28 Ld 5x5 QFN L28.5x5
(See Note)
(Pb-free)
ISL6443AIVZ* 6443A IVZ -40 to +85 28 Ld TSSOP M28.173
(See Note)
(Pb-free)
Add “-TK” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• Wide Input Supply Voltage Range
- Variable 5.6V to 24V
- Fixed 4.5V to 5.6V
• Three Independently Programmable Output Voltages
• Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . 300kHz
• Out of Phase PWM Controller Operation
- Reduces Required Input Capacitance and Power
Supply Induced Loads
• No External Current Sense Resistor
- Uses Lower MOSFET’s rDS(ON)
• Bidirectional Frequency Synchronization for
Synchronizing Multiple ISL6443As
• Programmable Soft-Start
• Extensive Circuit Protection Functions
- PGOOD
- UVLO
- Overcurrent
- Over-temperature
- Independent Shutdown for Both PWMs
• Excellent Dynamic Response
- Voltage Feed-Forward with Current Mode Control
• QFN Packages:
- QFN - Compliant to JEDEC PUB95 MO-220
QFN - Quad Flat No Leads - Package Outline
- Near Chip Scale Package Footprint, which Improves
PCB Efficiency and has a Thinner Profile
• Pb-Free (RoHS Compliant)
Applications
• Power Supplies with Multiple Outputs
• xDSL Modems/Routers
• DSP, ASIC, and FPGA Power Supplies
• Set-Top Boxes
• Dual Output Supplies for DSP, Memory, Logic, µP Core
and I/O
• Telecom Systems
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Pinouts
ISL6443A
(28 LD QFN)
TOP VIEW
ISL6443A
www.datasheet4u.com
28 27 26 25 24 23 22
PHASE2 1
21 ISEN1
ISEN2 2
20 PGND
PGOOD 3
19 SD1
VCC_5V 4
18 SS1
SD2 5
17 SGND
SS2 6
16 OCSET1
OCSET2 7
15 FB1
8 9 10 11 12 13 14
ISL6443A
(28 LD TSSOP)
TOP VIEW
LGATE2 1
BOOT2 2
UGATE2 3
PHASE2 4
ISEN2 5
PGOOD 6
VCC_5V 7
SD2 8
SS2 9
OCSET2 10
FB2 11
SGND 12
VIN 13
SYNC 14
28 LGATE1
27 BOOT1
26 UGATE1
25 PHASE1
24 ISEN1
23 PGND
22 SD1
21 SS1
20 SGND
19 OCSET1
18 FB1
17 SGND
16 GATE3
15 FB3
2 FN6600.1
December 7, 2007

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Block Diagram
BOOT1
UGATE1
PHASE1
VCC_5V
LGATE1
PGND
ADAPTIVE DEAD-TIME
V/I SAMPLE TIMING
PGOOD SD1
GATE3
FB3
gm*VE
0.8V REFERENCE
+
VE +
-
UV
PGOOD
1400kΩ
18.5pF
FB1
180kΩ
-
16kΩ
+ 0.8V
REF
+
ERROR AMP 1
- PWM1
+
VIN SGND
SD2
VCC_5V
POR
ENABLE
BIAS SUPPLIES
REFERENCE
FAULT LATCH
SOFT-START
OC1
OC2
UV
PGOOD
PWM2
-
+
ISEN1
CURRENT
SAMPLE
OCSET1
-
+ CURRENT
SAMPLE
+ 1.7V REFERENCE
DUTY CYCLE RAMP GENERATOR
PWM CHANNEL PHASE CONTROL
- OC1
OC2 -
++
VIN SYNC VCC_5V
SAME STATE FOR
2 CLOCK CYCLES
REQUIRED TO LATCH
OVERCURRENT FAULT
SAME STATE FOR
2 CLOCK CYCLES
REQUIRED TO LATCH
OVERCURRENT FAULT
ADAPTIVE DEAD-TIME
V/I SAMPLE TIMING
PGND
BOOT2
UGATE2
PHASE2
VCC_5V
LGATE2
18.5pF
16kΩ
ERROR AMP 2
1400kΩ
-
+
180kΩ
VSEN2
SOFT2
CURRENT
SAMPLE
-
+
+
1.7V REFERENCE
+
0.8V
REF
SS1
ISEN2
CURRENT
SAMPLE
OCSET2

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ISL6443A
Typical Application Schematic
www.datasheet4u.com
D1
BAT54HT1
C3
1µF
C4
0.1µF
VIN
SS1
18
10
BOOT1
24
C2
4.7µF
VCC_5V
4
SS2
6
BOOT2
27
C5
0.1µF
C7
0.1µF
VOUT1
+1.2V, 2A
C9 +
330µF
R1
4.99k
L1
6.4µH
Q1
FDS6990S
R2
10k
PGOOD
UGATE1 23
PHASE1 22
R3 ISEN1 21
1.4k
LGATE1 25
PGND 20
28 UGATE2
PHASE2
1
2 ISEN2 R4
1.4k
ISL6443A
26 LGATE2
(SEE NOTE)
8 FB2
FB1 15
SD1 19
SD2 5
OCSET1
16
R7 17 11
120k SGND
SYNC
SGND
9
14 SGND
13 GATE3
12 FB3
OCSET2
7
3 R8
120k
PGOOD
R9
10k
VCC_5V
+ C1
56µF
+12V
D2
BAT54HT1
C8
0.1µF
C6
1µF
L2
6.4µH
Q2
FDS6990S
+ C10
330µF
R5
31.6k
VOUT2
+3.3V, 2A
R6
10k
C11
0.01µF
VOUT2
+3.3V
R12
100
Q3
IRF7404
VOUT3
R10
21.5k
+2.5V, 500mA
C12
10µF
R11
10k
NOTE: Pin numbers correspond to the QFN pinout.
4 FN6600.1
December 7, 2007

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ISL6443A
Absolute Maximum Ratings
Supply Voltage (VCC_5V Pin) . . . . . . . . . . . . . . . . . . . . -0.3V to +7V
Input Voltage (VIN Pin). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+27V
BOOT1, 2 and UGATE1, 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . .+35V
PHASE1, 2 and ISEN1, 2
. . . . . . . . . . . . . . . . . . . . .-5V (<100ns, 10µJ)/-0.3V (DC) to +27V
BOOT1, 2 with Respect to PHASE1, 2 . . . . . . . . . . . . . . . . . . +6.5V
www.UEdaSGtDaAsTRhEea1tei,nt42gu. ..c.o.m. . . . . . . .(PHASE1, 2 - 0.3V) to (BOOT1, 2 + 0.3V)
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2000V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200V
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
28 Lead QFN (Notes 1, 2) . . . . . . . .
36
4
28 Lead TSSOP (Note 1) . . . . . . . . .
75
NA
Maximum Junction Temperature . . . . . . . . . . . . . . .-55°C to +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θJC is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. For θJA
the “case temp” location is the center of the exposed metal pad on the underside of the package. See Tech Brief TB379.
2. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to “Block Diagram” on page 3 and “Typical
Application Schematic” on page 4. VIN = 5.6V to 24V, or VCC_5V = 5V ±10%, TA = -40°C to +85°C (Note 6),
Typical values are at TA = +25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VIN SUPPLY
Input Voltage Range
5.6 12
24
V
Input Voltage Range
VCC_5V SUPPLY (Note 3)
VIN = VCC (Note 3)
4.5 5.0 5.6
V
Input Voltage
4.5 5.0 5.6
V
Output Voltage
Maximum Output Current
SUPPLY CURRENT
VIN > 5.6V, IL = 20mA
VIN = 12V
4.5 5.0 5.5
V
60 -
- mA
Shutdown Current (Note 4)
SD1 = SD2 = GND
- 50 375 μA
Operating Current (Note 5)
- 2.0 4.0 mA
REFERENCE SECTION
Nominal Reference Voltage
- 0.8 -
V
Reference Voltage Tolerance
-1.0 - 1.0 %
POWER-ON RESET
Rising VCC_5V Threshold
4.25 4.45
4.5
V
Falling VCC_5V Threshold
3.95 4.2
4.4
V
OSCILLATOR
Total Frequency Variation
260 300 340 kHz
Peak-to-Peak Sawtooth Amplitude (Note 6)
Ramp Offset (Note 6)
VIN = 12V
VIN = 5V
- 1.6 -
- 0.667 -
- 1.0 -
V
V
V
SYNC Input Rise/Fall Time (Note 6)
- 5.0 - ns
SYNC Frequency Range
4.16 4.8 5.44 MHz
SYNC Input HIGH Level
3.5 - - V
SYNC Input LOW Level
- - 1.5 V
5 FN6600.1
December 7, 2007