LTC2256-14.pdf 데이터시트 (총 30 페이지) - 파일 다운로드 LTC2256-14 데이타시트 다운로드

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FEATURES
www.datasheet4u.com
n 73.9dB SNR
n 88dB SFDR
n Low Power: 81mW/49mW/35mW
n Single 1.8V Supply
n CMOS, DDR CMOS or DDR LVDS Outputs
n Selectable Input Ranges: 1VP-P to 2VP-P
n 800MHz Full-Power Bandwidth S/H
n Optional Data Output Randomizer
n Optional Clock Duty Cycle Stabilizer
n Shutdown and Nap Modes
n Serial SPI Port for Configuration
n Pin Compatible 14-Bit and 12-Bit Versions
n 40-Pin (6mm × 6mm) QFN Package
APPLICATIONS
n Communications
n Cellular Base Stations
n Software Defined Radios
n Portable Medical Imaging
n Multi-Channel Data Acquisition
n Nondestructive Testing
Electrical Specifications Subject to Change
LTC2258-14
LTC2257-14/LTC2256-14
14-Bit, 65/40/25Msps
Ultralow Power 1.8V ADCs
DESCRIPTION
The LTC®2258-14/LTC2257-14/LTC2256-14 are sam-
pling 14-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. They are perfect
for demanding communications applications with AC
performance that includes 73.9dB SNR and 88dB spurious
free dynamic range (SFDR). Ultralow jitter of 0.17psRMS
allows undersampling of IF frequencies with excellent
noise performance.
DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typi-
cal) and no missing codes over temperature. The transition
noise is a low 1.2LSBRMS.
The digital outputs can be either full rate CMOS, double
data rate CMOS, or double data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC+ and ENCinputs may be driven differentially
or single ended with a sine wave, PECL, LVDS, TTL or
CMOS inputs. An optional clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
ANALOG
INPUT
+
INPUT
S/H
65MHz
CLOCK
CLOCK/DUTY
CYCLE
CONTROL
1.8V
VDD
14-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
1.2V
TO 1.8V
OVDD
D13
• CMOS
• OR
• LVDS
D0
OGND
GND
225814 TA01a
2-Tone FFT, fIN = 68MHz and 69MHz
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
10 20
FREQUENCY (MHz)
30
225814 TA01b
225814p
1

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LTC2258-14
LTC2257-14/LTC2256-14
ABSOLUTE MAXIMUM RATINGS (Notes 1, 2)
Supply Voltages (VDD, OVDD)....................... –0.3V to 2V
Analog Input Voltage (AIN+, AIN–,
wwwP.dAatRas/SheEeRt4,uS.cEomNSE) (Note 3)...........–0.3V to (VDD + 0.2V)
Digital Input Voltage (ENC+, ENC, CS,
SDI, SCK) (Note 4).................................... –0.3V to 3.9V
SDO (Note 4) ............................................ –0.3V to 3.9V
Digital Output Voltage ................ –0.3V to (OVDD + 0.3V)
Operating Temperature Range:
LTC2258C, LTC2257C, LTC2256C............. 0°C to 70°C
LTC2258I, LTC2257I, LTC2256I............ –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATIONS
FULL-RATE CMOS OUTPUT MODE
TOP VIEW
DOUBLE DATA RATE CMOS OUTPUT MODE
TOP VIEW
AIN+ 1
AIN– 2
GND 3
REFH 4
40 39 38 37 36 35 34 33 32 31
30 D9
29 D8
28 CLKOUT+
27 CLKOUT
REFH 5
REFL 6
41 26 OVDD
25 OGND
REFL 7
PAR/SER 8
24 D7
23 D6
VDD 9
22 D5
VDD 10
21 D4
11 12 13 14 15 16 17 18 19 20
AIN+ 1
AIN– 2
GND 3
REFH 4
40 39 38 37 36 35 34 33 32 31
30 D8_9
29 DNC
28 CLKOUT+
27 CLKOUT
REFH 5
REFL 6
41 26 OVDD
25 OGND
REFL 7
PAR/SER 8
24 D6_7
23 DNC
VDD 9
22 D4_5
VDD 10
21 DNC
11 12 13 14 15 16 17 18 19 20
UJ PACKAGE
40-LEAD (6mm s 6mm) PLASTIC QFN
TJMAX = 150°C, θJA = 32°C/W
EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB
UJ PACKAGE
40-LEAD (6mm s 6mm) PLASTIC QFN
TJMAX = 150°C, θJA = 32°C/W
EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB
DOUBLE DATA RATE LVDS OUTPUT MODE
TOP VIEW
2
AIN+ 1
AIN– 2
GND 3
REFH 4
40 39 38 37 36 35 34 33 32 31
30 D8_9+
29 D8_9
28 CLKOUT+
27 CLKOUT
REFH 5
REFL 6
41 26 OVDD
25 OGND
REFL 7
24 D6_7+
PAR/SER 8
23 D6_7
VDD 9
VDD 10
22 D4_5+
21 D4_5
11 12 13 14 15 16 17 18 19 20
UJ PACKAGE
40-LEAD (6mm s 6mm) PLASTIC QFN
TJMAX = 150°C, θJA = 32°C/W
EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB
225814p

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LTC2258-14
LTC2257-14/LTC2256-14
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2258CUJ-14#PBF LTC2258CUJ-14#TRPBF LTC2258UJ-14
40-Lead (6mm × 6mm) Plastic QFN
0°C to 70°C
wwwL.dTCat2a2s5h8eIUetJ4-u1.4c#oPmBF
LTC2257CUJ-14#PBF
LTC2258IUJ-14#TRPBF
LTC2257CUJ-14#TRPBF
LTC2258UJ-14
LTC2257UJ-14
40-Lead (6mm × 6mm) Plastic QFN
40-Lead (6mm × 6mm) Plastic QFN
–40°C to 85°C
0°C to 70°C
LTC2257IUJ-14#PBF
LTC2257IUJ-14#TRPBF
LTC2257UJ-14
40-Lead (6mm × 6mm) Plastic QFN
–40°C to 85°C
LTC2256CUJ-14#PBF LTC2256CUJ-14#TRPBF LTC2256UJ-14
40-Lead (6mm × 6mm) Plastic QFN
0°C to 70°C
LTC2256IUJ-14#PBF
LTC2256IUJ-14#TRPBF
LTC2256UJ-14
40-Lead (6mm × 6mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
CONVERTER CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
LTC2258-14
LTC2257-14
LTC2256-14
PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
Resolution (No Missing Codes)
l 14 14 14
Bits
Integral Linearity Error
Differential Analog Input (Note 6) l –3.75 ±1 3.75 –3.75 ±1 3.75 –3.5 ±1 3.5
LSB
Differential Linearity Error
Differential Analog Input
l –0.9 ±0.3 0.9 –0.9 ±0.3 0.9 –0.9 ±0.3 0.9
LSB
Offset Error
(Note 7)
l –9 ±1.5 9 –9 ±1.5 9 –9 ±1.5 9
mV
Gain Error
Internal Reference
External Reference
±1.5 ±1.5 ±1.5
l –1.5 ±0.4 1.5 –1.5 ±0.4 1.5 –1.5 ±0.4 1.5
%FS
%FS
Offset Drift
±20 ±20 ±20 μV/°C
Full-Scale Drift
Internal Reference
External Reference
±30 ±30 ±30 ppm/°C
±10 ±10 ±10 ppm/°C
Transition Noise
External Reference
1.2 1.2 1.2 LSBRMS
225814p
3

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LTC2258-14
LTC2257-14/LTC2256-14
ANALOG INPUT The l denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VIN Analog Input Range (AIN+ – AIN–)
1.7V < VDD < 1.9V
l
wwwV.dINa(tCaMsh) eet4Aun.acloogmInput Common Mode (AIN+ + AIN–)/2 Differential Analog Input (Note 8) l VCM – 100mV
VSENSE External Voltage Reference Applied to SENSE External Reference Mode
l 0.625
IINCM Analog Input Common Mode Current
Per Pin, 125Msps
Per Pin, 105Msps
Per Pin, 80Msps
IIN1 Analog Input Leakage Current
IIN2 PAR/SER Input Leakage Current
0 < AIN+, AIN– < VDD, No Encode
0 < PAR/SER < VDD
l
l
–1
–3
IIN3 SENSE Input Leakage Current
0.625 < SENSE < 1.3V
l –6
tAP Sample-and-Hold Acquisition Delay Time
tJITTER Sample-and-Hold Acquisition Delay Jitter
CMRR Analog Input Common Mode Rejection Ratio
1 to 2
VCM
1.250
155
130
100
0
0.17
80
VCM + 100mV
1.300
1
3
6
VP-P
V
V
μA
μA
μA
μA
μA
μA
ns
psRMS
dB
BW-3B Full-Power Bandwidth
Figure 6 Test Circuit
800 MHz
DYNAMIC ACCURACY The l denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 5)
LTC2258-14
LTC2257-14
LTC2256-14
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
SNR Signal-to-Noise Ratio
5MHz Input
70MHz Input
140MHz Input
l 71.3
73.9
73.8
73.4
73.4
71.3 73.1
72.7
72.8
70.9 72
71.4
dB
dB
dB
SFDR
Spurious Free Dynamic Range 5MHz Input
2nd or 3rd Harmonic
70MHz Input
140MHz Input
l 76
92
92
81
92
76 90
86
93
79 95
90
dB
dB
dB
Spurious Free Dynamic Range 5MHz Input
4th Harmonic or Higher
70MHz Input
140MHz Input
l 85
98
98
98
98
83 97
96
97
85 98
89
dB
dB
dB
S/(N+D) Signal-to-Noise Plus
Distortion Ratio
5MHz Input
70MHz Input
140MHz Input
l 70.2
73.7
73.7
72.4
73.2
70.2 73
72.3
72.7
70.4 72
71.1
dB
dB
dB
INTERNAL REFERENCE CHARACTERISTICS The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VCM Output Voltage
VCM Output Temperature Drift
VCM Output Resistance
VREF Output Voltage
IOUT = 0
–600μA < IOUT < 1mA
IOUT = 0
0.5 • VDD – 25mV
1.225
0.5 • VDD
±25
4
1.250
0.5 • VDD + 25mV
1.275
V
ppm/°C
Ω
V
VREF Output Temperature Drift
VREF Output Resistance
VREF Line Regulation
–400μA < IOUT < 1mA
1.7V < VDD < 1.9V
±25 ppm/°C
0.6 mV/V
225814p
4

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LTC2258-14
LTC2257-14/LTC2256-14
DIGITAL INPUTS AND OUTPUTS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
ENCODE INPUTS (ENC+, ENC)
wwwD.difaftearsehnetieatl4Eun.ccoodme Mode (ENCNot Tied to GND)
VID Differential Input Voltage
VICM Common Mode Input Voltage
VIN Input Voltage Range
(Note 8)
Internally Set
Externally Set (Note 8)
ENC+, ENCto GND
l 0.2
1.2
l 1.1
1.6
l 0.2
3.6
V
V
V
V
RIN Input Resistance
CIN Input Capacitance
Single-Ended Encode Mode (ENCTied to GND)
(See Figure 10)
(Note 8)
10 kΩ
3.5 pF
VIH High Level Input Voltage
VIL Low Level Input Voltage
VIN Input Voltage Range
VDD = 1.8V
VDD = 1.8V
ENC+ to GND
l 1.2
l
l0
V
0.6 V
3.6 V
RIN Input Resistance
CIN Input Capacitance
DIGITAL INPUTS (CS, SDI, SCK)
(See Figure 11)
(Note 8)
30 kΩ
3.5 pF
VIH High Level Input Voltage
VIL Low Level Input Voltage
IIN Input Current
VDD = 1.8V
VDD = 1.8V
VIN = 0V to 3.6V
l 1.3
l
l –10
V
0.6 V
10 μA
CIN Input Capacitance
(Note 8)
SDO OUTPUT (Open-Drain Output. Requires 2k Pull-Up Resistor if SDO is Used)
3 pF
ROL Logic Low Output Resistance to GND VDD = 1.8V, SDO = 0V
IOH Logic High Output Leakage Current
SDO = 0V to 3.6V
COUT Output Capacitance
(Note 8)
DIGITAL DATA OUTPUTS (CMOS MODES: FULL DATA RATE AND DOUBLE DATA RATE)
200 Ω
l –10
10 μA
4 pF
OVDD = 1.8V
VOH High Level Output Voltage
VOL Low Level Output Voltage
OVDD = 1.5V
VOH High Level Output Voltage
VOL Low Level Output Voltage
OVDD = 1.2V
VOH High Level Output Voltage
VOL Low Level Output Voltage
DIGITAL DATA OUTPUTS (LVDS MODE)
IO = –500μA
IO = 500μA
IO = –500μA
IO = 500μA
IO = –500μA
IO = 500μA
l 1.750
l
1.790
0.010
1.488
0.010
1.185
0.010
0.050
V
V
V
V
V
V
VOD Differential Output Voltage
100Ω Differential Load, 3.5mA Mode
l 247
350
454
mV
100Ω Differential Load, 1.75mA Mode
175 mV
VOS Common Mode Output Voltage
100Ω Differential Load, 3.5mA Mode
100Ω Differential Load, 1.75mA Mode
l 1.125
1.250
1.250
1.375
V
V
RTERM On-Chip Termination Resistance
Termination Enabled, OVDD = 1.8V
100 Ω
225814p
5