LTC2290.pdf 데이터시트 (총 24 페이지) - 파일 다운로드 LTC2290 데이타시트 다운로드

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FEATURES
www.daItanstheegert4aut.ecdomDual 12-Bit ADCs
Sample Rate: 10Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 120mW
71.3dB SNR
90dB SFDR
110dB Channel Isolation
Multiplexed or Separate Data Bus
Flexible Input: 1VP-P to 2VP-P Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)
10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit)
64-Pin (9mm × 9mm) QFN Package
U
APPLICATIO S
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
LTC2290
Dual 12-Bit, 10Msps
Low Power 3V ADC
DESCRIPTIO
The LTC®2290 is a 12-bit 10Msps, low power dual 3V
A/D converter designed for digitizing high frequency, wide
dynamic range signals. The LTC2290 is perfect for
demanding imaging and communications applications
with AC performance that includes 71.3dB SNR and 90dB
SFDR for signals well beyond the Nyquist frequency.
DC specs include ±0.3LSB INL (typ), ±0.15LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 0.25LSBRMS.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
A single-ended CLK input controls converter operation.
An optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
ANALOG
INPUT A
+
INPUT
S/H
CLK A
CLK B
CLOCK/DUTY CYCLE
CONTROL
CLOCK/DUTY CYCLE
CONTROL
ANALOG
INPUT B
+
INPUT
S/H
12-BIT
PIPELINED
ADC CORE
12-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
OVDD
D11A
•••
D0A
OGND
MUX
OUTPUT
DRIVERS
OVDD
D11B
•••
D0B
OGND
2295 TA01
Typical INL, 2V Range
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
1024
2048
CODE
3072
4096
2290 TA01
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LTC2290
ABSOLUTE AXI U RATI GS
OVDD = VDD (Notes 1, 2)
Supply Voltage (VDD) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
wwwA.dnaatalsohgeeItn4pu.ucot mVoltage (Note 3) ..... –0.3V to (VDD + 0.3V)
Digital Input Voltage .................... –0.3V to (VDD + 0.3V)
Digital Output Voltage ................ –0.3V to (OVDD + 0.3V)
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2290C ............................................... 0°C to 70°C
LTC2290I .............................................–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
UW U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
AINA+ 1
AINA– 2
REFHA 3
48 DA5
47 DA4
46 DA3
REFHA 4
45 DA2
REFLA 5
44 DA1
REFLA 6
43 DA0
VDD 7
42 NC
CLKA 8 65 41 NC
CLKB 9
40 OFB
VDD 10
REFLB 11
39 DB11
38 DB10
REFLB 12
37 DB9
REFHB 13
36 DB8
REFHB 14
AINB– 15
AINB+ 16
35 DB7
34 DB6
33 DB5
UP PACKAGE
64-LEAD (9mm × 9mm) PLASTIC QFN
TJMAX = 125°C, θJA = 20°C/W
EXPOSED PAD (PIN 65) IS GND AND MUST BE SOLDERED TO PCB
ORDER PART
NUMBER
QFN PART*
MARKING
LTC2290CUP
LTC2290IUP
LTC2290UP
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS The denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 4)
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Gain Matching
Offset Matching
Transition Noise
2
CONDITIONS
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
Internal Reference
External Reference
External Reference
SENSE = 1V
MIN TYP MAX UNITS
12
Bits
–1.3 ±0.3 1.3
LSB
–0.7 ±0.15 0.7
LSB
–12 ±2 12
mV
–2.5 ±0.5 2.5
%FS
±10 µV/°C
±30 ppm/°C
±5 ppm/°C
±0.3 %FS
±2 mV
0.25 LSBRMS
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LTC2290
A ALOG I PUT The denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at TA = 25°C. (Note 4)
SYMBOL
PARAMETER
wwwV.dINatasheet4u.coAmnalog Input Range (AIN+ –AIN–)
VIN,CM
Analog Input Common Mode (AIN+ +AIN–)/2
IIN
ISENSE
IMODE
tAP
tJITTER
CMRR
Analog Input Leakage Current
SENSEA, SENSEB Input Leakage
MODE Input Leakage Current
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Full Power Bandwidth
CONDITIONS
2.7V < VDD < 3.4V (Note 7)
Differential Input (Note 7)
Single Ended Input (Note 7)
0V < AIN+, AIN– < VDD
0V < SENSEA, SENSEB < 1V
0V < MODE < VDD
Figure 8 Test Circuit
MIN TYP MAX
±0.5 to ±1
1
1.5 1.9
0.5
1.5
2
–1
1
–3
3
–3
3
0
0.2
80
575
UNITS
V
V
V
µA
µA
µA
ns
psRMS
dB
MHz
DY A IC ACCURACY The denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 4)
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
SNR Signal-to-Noise Ratio
5MHz Input
69.6 71.3
dB
70MHz Input
70.7 dB
SFDR
Spurious Free Dynamic Range
2nd or 3rd Harmonic
5MHz Input
70MHz Input
74
90
85
dB
dB
SFDR
Spurious Free Dynamic Range
4th Harmonic or Higher
5MHz Input
70MHz Input
80
90
90
dB
dB
S/(N+D)
Signal-to-Noise Plus Distortion Ratio
5MHz Input
69 71.3
dB
70MHz Input
70.4 dB
IMD Intermodulation Distortion
Crosstalk
fIN = 4.3MHz, 4.6MHz
fIN = 5MHz
90 dB
–110 dB
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LTC2290
UU
U
I TER AL REFERE CE CHARACTERISTICS (Note 4)
PARAMETER
VCM Output Voltage
wwwV.dCaMtaOsuhtepeut4Tue.mcopmco
VCM Line Regulation
VCM Output Resistance
CONDITIONS
IOUT = 0
2.7V < VDD < 3.3V
–1mA < IOUT < 1mA
MIN
1.475
TYP
1.500
±25
3
4
MAX
1.525
UNITS
V
ppm/°C
mV/V
DIGITAL I PUTS A D DIGITAL OUTPUTS The denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
LOGIC INPUTS (CLK, OE, SHDN, MUX)
VIH
VIL
IIN
CIN
LOGIC OUTPUTS
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
VDD = 3V
VDD = 3V
VIN = 0V to VDD
(Note 7)
2
0.8
–10
10
3
V
V
µA
pF
OVDD = 3V
COZ
ISOURCE
ISINK
VOH
VOL
OVDD = 2.5V
VOH
VOL
OVDD = 1.8V
VOH
VOL
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
High Level Output Voltage
Low Level Output Voltage
High Level Output Voltage
Low Level Output Voltage
OE = High (Note 7)
VOUT = 0V
VOUT = 3V
IO = –10µA
IO = –200µA
IO = 10µA
IO = 1.6mA
IO = –200µA
IO = 1.6mA
IO = –200µA
IO = 1.6mA
3
50
50
2.995
2.7 2.99
0.005
0.09 0.4
2.49
0.09
1.79
0.09
pF
mA
mA
V
V
V
V
V
V
V
V
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LTC2290
POWER REQUIRE E TS The denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 8)
SYMBOL
PARAMETER
wwwV.dDaDtasheet4u.comAnalog Supply Voltage
OVDD
Output Supply Voltage
IVDD Supply Current
PDISS
Power Dissipation
PSHDN
Shutdown Power (Each Channel)
PNAP Nap Mode Power (Each Channel)
CONDITIONS
(Note 9)
(Note 9)
Both ADCs at fS(MAX)
Both ADCs at fS(MAX)
SHDN = H, OE = H, No CLK
SHDN = H, OE = L, No CLK
MIN TYP MAX
2.7 3 3.4
0.5 3 3.6
40 46
120 138
2
15
UNITS
V
V
mA
mW
mW
mW
WU
TI I G CHARACTERISTICS The denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 4)
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
fs Sampling Frequency
tL CLK Low Time
tH CLK High Time
tAP
tD
tMD
Pipeline Latency
Sample-and-Hold Aperture Delay
CLK to DATA Delay
MUX to DATA Delay
Data Access Time After OE
BUS Relinquish Time
(Note 9)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On (Note 7)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On (Note 7)
CL = 5pF (Note 7)
CL = 5pF (Note 7)
CL = 5pF (Note 7)
(Note 7)
1
10 MHz
40
5
50 500
50 500
ns
ns
40
5
50 500
50 500
ns
ns
0 nS
1.4 2.7 5.4
ns
1.4 2.7 5.4
ns
4.3 10
ns
3.3 8.5
ns
5 Cycles
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3: When these pin voltages are taken below GND or above VDD, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above VDD without latchup.
Note 4: VDD = 3V, fSAMPLE = 10MHz, input range = 2VP-P with differential
drive, unless otherwise noted.
Note 5: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6: Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 0000 0000 0000 and 1111 1111 1111.
Note 7: Guaranteed by design, not subject to test.
Note 8: VDD = 3V, fSAMPLE = 10MHz, input range = 1VP-P with differential
drive. The supply current and power dissipation are the sum total for both
channels with both channels active.
Note 9: Recommended operating conditions.
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