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®
Data Sheet
May 11, 2009
ISL6265A
FN6884.0
Multi-Output Controller with Integrated
MOSFET Drivers for AMD SVI Capable
Mobile CPUs
The ISL6265A is a multi-output controller with embedded
gate drivers. A single-phase controller powers the
Northbridge (VDDNB) portion of the CPU. The two
remaining controller channels can be configured for
two-phase or individual single-phase outputs. For uniplane
CPU applications, the ISL6265A is configured as a
two-phase buck converter. This allows the controller to
interleave channels to effectively double the output voltage
ripple frequency, and thereby reduce output voltage ripple
amplitude with fewer components, lower component cost,
reduced power dissipation, and smaller area. For dual-plane
processors, the ISL6265A can be configured as independent
single-phase controllers powering VDD0 and VDD1.
The heart of the ISL6265A is the patented R3 Technology™,
Intersil’s Robust Ripple Regulator modulator. Compared with
the traditional buck regulator, the R3 Technologyhas a
faster transient response. This is due to the R3 modulator
commanding variable switching frequency during a load
transient.
The Serial VID Interface (SVI) allows dynamic adjustment of
the Core and Northbridge output voltages independently and
in combination from 0.500V to 1.55V. Core and Northbridge
output voltages achieve a 0.5% system accuracy
over-temperature.
A unity-gain differential amplifier is provided for remote CPU
die sensing. This allows the voltage on the CPU die to be
accurately regulated per AMD mobile CPU specifications.
Core output current sensing is realized using lossless
inductor DCR sensing. All outputs feature overcurrent,
overvoltage and undervoltage protection.
Ordering Information
PART NUMBER
(Note)
PART
MARKING
TEMP
RANGE
(°C)
PACKAGE PKG.
(Pb-Free) DWG. #
ISL6265AHRTZ 6265A HRTZ -10 to +100 48 Ld 6x6 TQFN L48.6x6
ISL6265AHRTZ-T* 6265A HRTZ -10 to +100 48 Ld 6x6 TQFN L48.6x6
Tape and Reel
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach materials,
and 100% matte tin plate plus anneal (e3 termination finish, which is
RoHS compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020
Features
• Core Configuration Flexibility
- Dual Plane, Single-Phase Controllers
- Uniplane, Two-Phase Controller
• Precision Voltage Regulators
- 0.5% System Accuracy Over-temperature
• Voltage Positioning with Adjustable Load Line and Offset
• Internal Gate Drivers with 2A Driving Capability
• Differential Remote CPU Die Voltage Sensing
• Core Differential Current Sensing: DCR or Resistor
• Northbridge Lossless rDS(ON) Current Sensing
• Serial VID Interface
- Two Wire Clock and Data Bus
- Supports High-Speed I2C
- 0.500V to 1.55V in 12.5mV Steps
- Supports PSI_L Power-Saving Mode
• Core Outputs Feature Phase Shedding with PSI_L
• Adjustable Output-Voltage Offset
• Digital Soft-Start of all Outputs
• User Programmable Switching Frequency
• Static and Dynamic Current Sharing (Uniplane Core)
• Overvoltage, Undervoltage, and Overcurrent Protection
• Pb-Free (RoHS compliant)
Pinout
ISL6265A
(48 LD 6X6 TQFN)
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
OFS/VFIXEN 1
PGOOD 2
PWROK 3
SVD 4
SVC 5
ENABLE 6
RBIAS 7
OCSET 8
VDIFF0 9
FB0 10
COMP0 11
VW0 12
49
GND
[BOTTOM]
36 BOOT_NB
35 BOOT0
34 UGATE0
33 PHASE0
32 PGND0
31 LGATE0
30 PVCC
29 LGATE1
28 PGND1
27 PHASE1
26 UGATE1
25 BOOT1
13 14 15 16 17 18 19 20 21 22 23 24
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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www.FDautanScheteiot4Un.cBomlock Diagram
ISL6265A
SVC
SVD
PWROK
OFS/FIXEN
RTN_NB VSEN_NB
FB_NB
COMP_NB FSET_NB
VNB
IFSET_NB
PVCC
1
1.5kΩ
NO DROOP
PSI_L
I_OFS
VREF_NB
VREF0
VREF1
3.0kΩ
E/A
VREF_NB
FLT
MODULATOR
NB
VIN
MOSFET
DRIVER
SHOOT-THRU
PROTECTION
DE MODE
PSI_L
OCSET_NB
OCSET
RBIAS
VW0
COMP0
FB0
VDIFF0
VSEN0
RTN0
ISP0
ISN0
ISP1
ISN1
VSEN1
RTN1
VDIFF1
FAULT
PROTECTION
FLT
VNB
V0
V1
ISEN0
ISEN1
RTN1
POWER-ON
RESET AND
SOFT-START
LOGIC
MODE
IVW0
PVCC
I_OFS
V0
1
NO
DROOP
CURRENT
SENSE
MODE
E/A
VREF0
VIN
ISEN0
MODE
ISEN1
CURRENT
BALANCE
CURRENT
SENSE
NO
DROOP
V1
1
VREF1
MODE
I_OFS
E/A
FLT
MOSFET
DRIVER
SHOOT-THRU
PROTECTION
DE MODE
MODULATOR
CORE
PSI_L
PVCC
FLT
MOSFET
DRIVER
SHOOT-THRU
PROTECTION
DE MODE
IVW1
PSI_L
FB1 COMP1 VW1
FIGURE 1. SIMPLIFIED FUNCTION BLOCK DIAGRAM OF ISL6265A
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
PGND_NB
PVCC
VCC
ENABLE
PGOOD
GND
VIN
BOOT0
UGATE0
PHASE0
LGATE0
PGND0
BOOT1
UGATE1
PHASE1
LGATE1
PGND1
2 FN6884.0
May 11, 2009

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ISL6265A
www.SDaitmaSpheleift4iUe.dcomApplication Circuit for Dual Plane and Northbridge Support
+5V VIN
SVI DATA
SVI CLOCK
ENABLE
PWROK
VDDPWRGD
REMOTE
SENSE
REMOTE
SENSE
VDD_PLANE_STRAP
VCC PVCC VIN GND
SVD
SVC
EN
PWROK
PGOOD
VSEN0
RTN0
VSEN1
RTN1
UGATE0
BOOT0
PHASE0
LGATE0
PGND0
ISP0
ISN0
OFS/VFIXEN
VDIFF0
RBIAS
OCSET
FB0
COMP0
VW0
VDIFF1
FB1
COMP1
VW1
FSET_NB
COMP_NB
FB_NB
ISL6265A
UGATE1
BOOT1
PHASE1
LGATE1
PGND1
ISP1
ISN1
UGATE_NB
BOOT_NB
PHASE_NB
LGATE_NB
PGND_NB
OCSET_NB
VSEN_NB
RTN_NB
+VIN
CIN
LOUT
VDD0
CORE
LOAD
+VIN
CIN
LOUT
VDD1
+VIN
CIN
LOUT
CORE
LOAD
VDDNB
NB
LOAD
FIGURE 2. ISL6265A BASED DUAL-PLANE AND NORTHBRIDGE CONVERTERS WITH INDUCTOR DCR CURRENT SENSING
3 FN6884.0
May 11, 2009

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ISL6265A
www.SDaitmaSpheleift4iUe.dcomApplication Circuit for Uniplane Core and Northbridge Support
+5V VIN
SVI DATA
SVI CLOCK
ENABLE
PWROK
VDDPWRGD
REMOTE
SENSE
REMOTE
SENSE
VDD_PLANE_STRAP
VCC PVCC
SVD
SVC
EN
PWROK
PGOOD
VSEN0
RTN0
VSEN1
RTN1
OFS/VFIXEN
GND
UGATE0
BOOT0
PHASE0
LGATE0
PGND0
ISP0
ISN0
RBIAS
OCSET
VDIFF0
FB0
COMP0
VW0
OPEN VDIFF1
ISL6265A
UGATE1
BOOT1
PHASE1
LGATE1
PGND1
ISP1
ISN1
OPEN FB1
OPEN COMP1
OPEN VW1
FSET_NB
COMP_NB
FB_NB
UGATE_NB
BOOT_NB
PHASE_NB
LGATE_NB
PGND_NB
OCSET_NB
VSEN_NB
RTN_NB
+VIN
CIN
LOUT
CORE
LOAD
+VIN
CIN
LOUT
VDD0
+VIN
CIN
LOUT
CORE
LOAD
VDDNB
NB
LOAD
FIGURE 3. ISL6265A BASED UNIPLANE AND NORTHBRIDGE CONVERTERS WITH INDUCTOR DCR CURRENT SENSING
4 FN6884.0
May 11, 2009

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ISL6265A
www.SDaitmaSpheleift4iUe.dcomApplication Circuit for Dual Layout
+5V VIN
SVI DATA
SVI CLOCK
ENABLE
PWROK
VDDPWRGD
VCC PVCC
SVD
SVC
EN
PWROK
PGOOD
REMOTE
SENSE
VDD_PLANE_STRAP
+1.8V
REMOTE
SENSE
DNP UNIPLANE
VSEN0
RTN0
RTN1
VSEN1
OFS/VFIXEN
GND
UGATE0
BOOT0
PHASE0
LGATE0
PGND0
ISP0
ISN0
RBIAS
OCSET
VDIFF0
FB0
COMP0
VW0
VDIFF1
ISL6265A
UGATE1
BOOT1
PHASE1
LGATE1
PGND1
ISP1
ISN1
FB1
COMP1
VW1
FSET_NB
COMP_NB
FB_NB
UGATE_NB
BOOT_NB
PHASE_NB
LGATE_NB
PGND_NB
OCSET_NB
VSEN_NB
RTN_NB
+VIN
CIN
LOUT
VDD0
CORE
LOAD
+VIN
CIN
LOUT
+VIN
CIN
LOUT
UNIPLANE
VDD0
DNP
DUAL
PLANE
VDD1
CORE
LOAD
VDDNB
NB
LOAD
FIGURE 4. ISL6265A BASED UNIPLANE OR DUAL PLANE CORE CONVERTER WITH INDUCTOR DCR CURRENT SENSING
5 FN6884.0
May 11, 2009