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Electrical Specifications Subject to Change
LTC2268-14/
LTC2267-14/LTC2266-14
14-Bit, 125Msps/105Msps/
80Msps Low Power Dual ADCs
FEATURES
n 2-Channel Simultaneous Sampling ADC
n 73.4dB SNR
n 88dB SFDR
n Low Power: 299mW/243mW/203mW
n Single 1.8V Supply
n Serial LVDS Outputs: 1 or 2 Bits per Channel
n Selectable Input Ranges: 1VP-P to 2VP-P
n 800MHz Full Power Bandwidth S/H
n Shutdown and Nap Modes
n Serial SPI Port for Configuration
n Pin Compatible 14-Bit and 12-Bit Versions
n 40-Pin (6mm × 6mm) QFN Package
APPLICATIONS
n Communications
n Cellular Base Stations
n Software Defined Radios
n Portable Medical Imaging
n Multichannel Data Acquisition
n Nondestructive Testing
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
wwwT.eDchantoalSoghyeCeortp4oUra.tcioonm. All other trademarks are the property of their respective owners.
DESCRIPTION
The LTC®2268-14/LTC2267-14/LTC2266-14 are 2-channel,
simultaneous sampling 14-bit A/D converters designed
for digitizing high frequency, wide dynamic range signals.
They are perfect for demanding communications applica-
tions with AC performance that includes 73.4dB SNR and
88dB spurious free dynamic range (SFDR). Ultralow jitter
of 0.15psRMS allows undersampling of IF frequencies with
excellent noise performance.
DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1.2 LSBRMS.
The digital outputs are serial LVDS to minimize the num-
ber of data lines. Each channel outputs two bits at a time
(2-lane mode). At lower sampling rates there is a one bit
per channel option (1-lane mode). The LVDS drivers have
optional internal termination and adjustable output levels
to ensure clean signal integrity.
The ENC+ and ENCinputs may be driven differentially
or single-ended with a sine wave, PECL, LVDS, TTL, or
CMOS inputs. An internal clock duty cycle stabilizer al-
lows high performance at full speed for a wide range of
clock duty cycles.
TYPICAL APPLICATION
1.8V
VDD
1.8V
OVDD
CH.1
ANALOG
INPUT
CH.2
ANALOG
INPUT
ENCODE
INPUT
S/H
S/H
14-BIT
ADC CORE
14-BIT
ADC CORE
PLL
DATA
SERIALIZER
OUT1A
OUT1B
OUT2A
OUT2B
DATA
CLOCK
OUT
FRAME
GND
OGND
226814 TA01
SERIALIZED
LVDS
OUTPUTS
LTC2268-14, 125Msps,
2-Tone FFT, fIN = 70MHz and 75MHz
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0 10 20 30 40 50 60
FREQUENCY (MHz)
226814 TA01b
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LTC2268-14/
LTC2267-14/LTC2266-14
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltages
VDD, OVDD................................................ –0.3V to 2V
Analog Input Voltage (AIN+, AIN–,
PAR/SER, SENSE) (Note 3).............–0.3V to (VDD+0.2V)
Digital Input Voltage (ENC+, ENC, CS,
SDI, SCK) (Note 4).................................... –0.3V to 3.9V
SDO (Note 4) ............................................ –0.3V to 3.9V
Digital Output Voltage .................. –0.3V to (OVDD+0.3V)
Operating Temperature Range
LTC2268C, 2267C, 2266C........................ 0°C to 70°C
LTC2268I, 2267I, 2266I ....................... –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
AIN1+ 1
AIN1– 2
VCM1 3
REFH 4
40 39 38 37 36 35 34 33 32 31
30 OUT1B+
29 OUT1B
28 DCO+
27 DCO
REFH 5
REFL 6
41 26 OVDD
25 OGND
REFL 7
24 FR+
VCM2 8
AIN2+ 9
AIN2– 10
23 FR
22 OUT2A+
21 OUT2A
11 12 13 14 15 16 17 18 19 20
UJ PACKAGE
40-LEAD (6mm s 6mm) PLASTIC QFN
TJMAX = 150°C, θJA = 32°C/W
EXPOSED PAD (PIN 41) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC2268CUJ-14#PBF
LTC2268CUJ-14#TRPBF LTC2268UJ-14
40-Lead (6mm × 6mm) Plastic QFN
0°C to 70°C
wwwL.DTCa2ta2S68hIeUeJt-41U4.#cPoBmF
LTC2267CUJ-14#PBF
LTC2268IUJ-14#TRPBF LTC2268UJ-14
LTC2267CUJ-14#TRPBF LTC2267UJ-14
40-Lead (6mm × 6mm) Plastic QFN
40-Lead (6mm × 6mm) Plastic QFN
–40°C to 85°C
0°C to 70°C
LTC2267IUJ-14#PBF
LTC2267IUJ-14#TRPBF LTC2267UJ-14
40-Lead (6mm × 6mm) Plastic QFN
–40°C to 85°C
LTC2266CUJ-14#PBF
LTC2266CUJ-14#TRPBF LTC2266UJ-14
40-Lead (6mm × 6mm) Plastic QFN
0°C to 70°C
LTC2266IUJ-14#PBF
LTC2266IUJ-14#TRPBF LTC2266UJ-14
40-Lead (6mm × 6mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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22687614p

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LTC2268-14/
LTC2267-14/LTC2266-14
CONVERTER CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
LTC2268-14
LTC2267-14
LTC2266-14
PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
Resolution
(No Missing Codes)
l 14 14 14
Bits
Integral Linearity Error
Differential Analog Input
(Note 6)
l –3.75 ±1 3.75 –3.75 ±1 3.75 –3.5 ±1 3.5
LSB
Differential Linearity Error Differential Analog Input
l –0.9 ±0.3 0.9 –0.9 ±0.3 0.9 –0.9 ±0.3 0.9
LSB
Offset Error
(Note 7)
l –15 ±2 15 –15 ±2 15 –15 ±2 15
mV
Gain Error
Internal Reference
External Reference
±1.5 ±1.5 ±1.5
l –1.5 ±0.4 1.5 –1.5 ±0.4 1.5 –1.5 ±0.4 1.5
%FS
%FS
Offset Drift
±20 ±20 ±20 μV/°C
Full-Scale Drift
Internal Reference
External Reference
±30 ±30 ±30 ppm/°C
±10 ±10 ±10 ppm/°C
Gain Matching
External Reference
±0.3 ±0.3 ±0.3 %FS
Offset Matching
±2 ±2 ±2 mV
Transition Noise
External Reference
1.2 1.2 1.2 LSBRMS
ANALOG INPUT The l denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
VIN
VIN(CM)
Analog Input Range (AIN+ – AIN–)
Analog Input Common Mode (AIN+ – AIN–)/2
VSENSE External Voltage Reference Applied to SENSE
IINCM Analog Input Common Mode Current
wwwI.IDN1ataSheeAt4nUal.ocgomInput Leakage Current (No Encode)
IIN2 PAR/SER Input Leakage Current
IIN3 SENSE Input Leakage Current
tAP Sample-and-Hold Acquisition Delay Time
tJITTER Sample-and-Hold Acquisition Delay Jitter
CMRR Analog Input Common Mode Rejection Ratio
CONDITIONS
1.7V < VDD < 1.9V
Differential Analog Input (Note 8)
External Reference Mode
Per Pin, 125Msps
Per Pin, 105Msps
Per Pin, 80Msps
0 < AIN+, AIN– < VDD
0 < PAR/SER < VDD
0.625 < SENSE < 1.3V
MIN
l
l VCM – 100mV
l 0.625
l
l –1
l –3
l –6
TYP
1 to 2
VCM
1.25
155
130
100
0
0.15
80
MAX
VCM +100mV
1.3
1
3
6
UNITS
VP–P
V
V
μA
μA
μA
μA
μA
μA
ns
psRMS
dB
BW-3B Full Power Bandwidth
Figure 6 Test Circuit
800 MHz
22687614p
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LTC2268-14/
LTC2267-14/LTC2266-14
DIGITAL ACCURACY The l denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 5)
LTC2268-14
LTC2267-14
LTC2266-14
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
SNR Signal-to-Noise Ratio
5MHz Input
70MHz Input
140MHz Input
73.4
l 71.3 73.2
72.7
73.4
71.3 73.2
72.7
73.1
70.9 72.9
72.4
SFDR
Spurious Free Dynamic Range
2nd or 3rd Harmonic
5MHz Input
70MHz Input
140MHz Input
l 76
88
85
82
88
76 85
82
88
79 85
82
Spurious Free Dynamic Range
4th Harmonic or Higher
5MHz Input
70MHz Input
140MHz Input
l 85
90
90
90
90
83 90
90
90
85 90
90
S/(N+D) Signal-to-Noise Plus Distortion 5MHz Input
Ratio
70MHz Input
140MHz Input
73
l 70.2 72.6
72
73
70.2 72.6
72
72.9
70.4 72.6
72
Crosstalk
10MHz Input
–105 –105 –105
UNITS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBFS
dBc
INTERNAL REFERENCE CHARACTERISTICS The l denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at TA = 25°C. AIN = –1dBFS. (Note 5)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VCM Output Voltage
VCM Output Temperature Drift
VCM Output Resistance
VREF Output Voltage
VREF Output Temperature Drift
VREF Output Resistance
VREF Line Regulation
IOUT = 0
–600μA < IOUT < 1mA
IOUT = 0
–400μA < IOUT < 1mA
1.7V < VDD < 1.9V
0.5 VDD – 25mV
1.225
0.5 VDD
±25
4
1.25
±25
7
0.6
0.VDD + 25mV
1.275
V
ppm/°C
Ω
V
ppm/°C
Ω
mV/V
DIGITAL INPUTS AND OUTPUTSwww.DataSheet4U.com
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
ENCODE INPUTS (ENC+, ENC)
DIFFERENTIAL ENCODE MODE (ENCNOT TIED TO GND)
VID Differential Input Voltage
(Note 8)
VICM Common Mode Input Voltage
Internally Set
Externally Set (Note 8)
VIN Input Voltage Range
ENC+, ENCto GND
RIN Input Resistance
(See Figure 10)
CIN Input Capacitance
SINGLE-ENDED ENCODE MODE (ENCTIED TO GND)
VIH High Level Input Voltage
VIL Low Level Input Voltage
VIN Input Voltage Range
RIN Input Resistance
CIN Input Capacitance
VDD =1.8V
VDD =1.8V
ENC+ to GND
(See Figure 11)
MIN TYP MAX UNITS
l 0.2
V
1.2
l 1.1
1.6
V
V
l 0.2
3.6 V
10 kΩ
3.5 pF
l 1.2
V
l 0.6 V
l0
3.6 V
30 kΩ
3.5 pF
22687614p
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LTC2268-14/
LTC2267-14/LTC2266-14
DIGITAL INPUTS AND OUTPUTS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
MIN
DIGITAL INPUTS (CS, SDI, SCK in Serial or Parallel Programming Mode. SDO in Parallel Programming Mode)
TYP
MAX UNITS
VIH High Level Input Voltage
VDD =1.8V
l 1.3
V
VIL Low Level Input Voltage
VDD =1.8V
l
0.6 V
IIN Input Current
VIN = 0V to 3.6V
l –10
10 μA
CIN Input Capacitance
3 pF
SDO OUTPUT (Serial Programming Mode. Open Drain Output. Requires 2kΩ Pull-Up Resistor if SDO is Used)
ROL Logic Low Output Resistance to GND
IOH Logic High Output Leakage Current
COUT Output Capacitance
DIGITAL DATA OUTPUTS
VDD =1.8V, SDO = 0V
SDO = 0V to 3.6V
l –10
200
3
10
Ω
μA
pF
VOD Differential Output Voltage
100Ω Differential Load, 3.5mA Mode l
247
350
454
mV
100Ω Differential Load, 1.75mA Mode l
125
175
250
mV
VOS Common Mode Output Voltage 100Ω Differential Load, 3.5mA Mode l 1.125 1.25 1.375
100Ω Differential Load, 1.75mA Mode l 1.125 1.25 1.375
V
V
RTERM On-Chip Termination Resistance
Termination Enabled, OVDD =1.8V
100 Ω
POWER REQUIREMENTS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 9)
LTC2268-14
LTC2267-14
LTC2266-14
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
VDD
OVDD
IVDD
Analog Supply Voltage (Note 10)
Output Supply Voltage (Note 10)
Analog Supply Current Sine Wave Input
l 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9
l 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9
l 150 TBD
119 TBD
98 TBD
V
V
mA
IOVDD Digital Supply Current 2-Lane Mode, 1.75mA Mode l
w w w . D a t a S h 2e-Lanee Mtode4, 3.U5mA. Mocde o ml
PDISS Power Dissipation
2-Lane Mode, 1.75mA Mode l
2-Lane Mode, 3.5mA Mode l
16 TBD
30 TBD
299 TBD
324 TBD
16 TBD
29 TBD
243 TBD
266 TBD
15 TBD
29 TBD
203 TBD
229 TBD
mA
mA
mW
mW
PSLEEP Sleep Mode Power
1 1 1 mW
PNAP Nap Mode Power
70 70 70 mW
PDIFFCLK Power Increase with Differential Encode Mode Enabled
20
20
20 mW
(No Increase for Sleep Mode)
TIMING CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
LTC2268-14
LTC2267-14
LTC2266-14
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
fS
Sampling Frequency
(Notes 10, 11)
l5
125 5
105 5
80 MHz
tENCL ENC Low Time (Note 8) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l 3.8 4 100 4.52 4.76 100 5.93 6.25 100
l2
4 100 2 4.76 100 2 6.25 100
ns
ns
tENCH
Analog Supply Current
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l 3.8 4 100 4.52 4.76 100 5.93 6.25 100
l2
4 100 2 4.76 100 2 6.25 100
ns
ns
tAP Sample-and-Hold
Acquisition Delay Time
0 0 0 ns
22687614p
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