MCP3905.pdf 데이터시트 (총 30 페이지) - 파일 다운로드 MCP3905 데이타시트 다운로드

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Obsolete Device
Replacement Device:
MCP3905A/MCP3906A
MCP3905/06
Energy-Metering ICs with Active (Real) Power Pulse Output
Features
• Supplies active (real) power measurement for
single-phase, residential energy-metering
• Supports the IEC 62053 International Energy
Metering Specification and legacy IEC 1036/
61036/687 Specifications
• Two multi-bit, Digital-to-Analog Converters
(DACs), second-order, 16-bit, Delta-Sigma
Analog-to-Digital Converters (ADCs)
• 0.1% typical measurement error over 500:1
dynamic range (MCP3905)
• 0.1% typical measurement error over 1000:1
dynamic range (MCP3906)
• Programmable Gain Amplifier (PGA) for small-
signal inputs supports low-value shunt current
sensor
- 16:1 PGA - MCP3905
- 32:1 PGA - MCP3906
• Ultra-low drift on-chip reference: 15 ppm/°C
(typical)
• Direct drive for electromagnetic mechanical
counter and two-phase stepper motors
• Low IDD of 4 mA (typical)
• Tamper output pin for negative power indication
• Industrial Temperature Range: -40°C to +85°C
• Supplies instantaneous active (real) power on
www.DataSheet4HUF.cOomUT for meter calibration
US Patents Pending
Functional Block Diagram
G0 G1
CH0+
CH0-
REFIN/
OUT
CH1+
CH1-
+
PGA
16-bit
Multi-level
ΔΣ ADC
2.4V
Reference
+
16-bit
Multi-level
ΔΣ ADC
HPF
HPF1
HPF1
Description
The MCP3905/06 devices are energy-metering ICs
designed to support the IEC 62053 International
Metering Standard Specification. They supply a
frequency output proportional to the average active
(real) power, as well as a higher-frequency output
proportional to the instantaneous power for meter
calibration. They include two 16-bit, delta-sigma ADCs
for a wide range of IB and IMAX currents and/or small
shunt (< 200 µOhms) meter designs. It includes an
ultra-low drift voltage reference with < 15 ppm/°C
through a specially designed band gap temperature
curve for the minimum gradient across the industrial
temperature range. A fixed-function DSP block is
on-chip for active (real) power calculation. Strong
output drive for mechanical counters are on-chip to
reduce field failures and mechanical counter sticking. A
no-load threshold block prevents any current creep
measurements. A Power-On Reset (POR) block
restricts meter performance during low-voltage
situations. These accurate energy-metering ICs with
high field reliability are available in the industry-
standard pinout.
Package Type
24-Pin SSOP DVDD
HPF
AVDD
NC
CH0+
CH0-
CH1-
CH1+
MCLR
REFIN/OUT
AGND
F2
1
2
3
4
5
6
7
8
9
10
11
12
24 FOUT0
23 FOUT1
22 HFOUT
21 DGND
20 NEG
19 NC
18 OSC2
17 OSC1
16 G0
15 G1
14 F0
13 F1
OSC1 OSC2
HFOUT
F2 F1 F0
FOUT0
FOUT1
NEG
X LPF1
E-to-F
conversion
POR
MCLR
© 2009 Microchip Technology Inc.
DS21948E-page 1

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MCP3905/06
NOTES:
www.DataSheet4U.com
DS21948E-page 2
© 2009 Microchip Technology Inc.

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MCP3905/06
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VDD...................................................................................7.0V
Digital inputs and outputs w.r.t. AGND........ -0.6V to VDD +0.6V
Analog input w.r.t. AGND ..................................... ....-6V to +6V
VREF input w.r.t. AGND .............................. -0.6V to VDD +0.6V
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-65°C to +125°C
Soldering temperature of leads (10 seconds) ............. +300°C
ESD on the analog inputs (HBM,MM) .................5.0 kV, 500V
ESD on all other pins (HBM,MM) ........................5.0 kV, 500V
† Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 4.5V – 5.5V,
Internal VREF, HPF turned on (AC mode), AGND, DGND = 0V, MCLK = 3.58 MHz; TA = -40°C to +85°C.
Parameter
Sym
Min Typ. Max Units
Comment
Overall Measurement Accuracy
Energy Measurement Error
E
— 0.1
— % FOUT Channel 0 swings 1:500 range,
MCP3905 only (Note 1, Note 4)
— 0.1
— % FOUT Channel 0 swings 1:1000 range,
MCP3906 only (Note 1, Note 4)
No-Load Threshold/
Minimum Load
NLT — 0.0015 — % FOUT Disabled when F2, F1, F0 = 0, 1, 1
Max. (Note 5, Note 6)
Phase Delay Between
Channels
— — 1/MCLK s HPF = 0 and 1, < 1 MCLK
(Note 4, Note 6, Note 7)
AC Power Supply
AC PSRR
Rejection Ratio
(Output Frequency Variation)
0.01
— % FOUT F2, F1, F0 = 0, 1, 1 (Note 3)
DC Power Supply
DC PSRR
Rejection Ratio
(Output Frequency Variation)
0.01
— % FOUT HPF = 1, Gain = 1 (Note 3)
www.DataSheeSt4yUs.cteomm Gain Error
ADC/PGA Specifications
—3
10 % FOUT Note 2, Note 5
Offset Error
Gain Error Match
Internal Voltage Reference
VOS
—2
— 0.5
5 mV Referred to Input
— % FOUT Note 8
Voltage
— 2.4
V
Tolerance
— ±2
%
Tempco
— 15
— ppm/°C
Note 1: Measurement error = (Energy Measured By Device - True Energy)/True Energy * 100%. Accuracy is
measured with signal (±660 mV) on Channel 1. FOUT0, FOUT1 pulse outputs. Valid from 45 Hz to 65 Hz.
See Section 2.0 “Typical Performance Curves” for higher frequencies and increased dynamic range.
2: Does not include internal VREF. Gain = 1, CH0 = 470 mVDC, CH1 = 660 mVDC, difference between
measured output frequency and expected transfer function.
3: Percent of HFOUT output frequency variation; Includes external VREF = 2.5V, CH1 = 100 mVRMS @
50 Hz, CH2 = 100 mVRMS @ 50 Hz, AVDD = 5V + 1Vpp @ 100 Hz. DC PSRR: 5V ±500 mV.
4: Error applies down to 60° lead (PF = 0.5 capacitive) and 60° lag (PF = 0.5 inductive).
5: Refer to Section 4.0 “Device Overview” for complete description.
6: Specified by characterization, not production tested.
7: 1 MCLK period at 3.58 MHz is equivalent to less than <0.005 degrees at 50 or 60 Hz.
8: Gain error match is measured from CH0 G = 1 to any other gain setting.
© 2009 Microchip Technology Inc.
DS21948E-page 3

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MCP3905/06
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 4.5V – 5.5V,
Internal VREF, HPF turned on (AC mode), AGND, DGND = 0V, MCLK = 3.58 MHz; TA = -40°C to +85°C.
Parameter
Sym
Min Typ. Max Units
Comment
Reference Input
Input Range
2.2 —
2.6
V
Input Impedance
3.2 — — kΩ
Input Capacitance
— — 10 pF
Analog Inputs
Maximum Signal Level
Differential Input Voltage
Range Channel 0
——
±1
V CH0+,CH0-,CH1+,CH1- to AGND
— — ±470/G mV G = PGA Gain on Channel 0
Differential Input Voltage
Range Channel 1
— — ±660 mV
Input Impedance
390 — — kΩ Proportional to 1/MCLK frequency
Bandwidth
(Notch Frequency)
— 14 — kHz Proportional to MCLK frequency,
MCLK/256
Oscillator Input
Frequency Range
MCLK
1
4 MHz
Power Specifications
Operating Voltage
4.5 —
5.5
V AVDD, DVDD
IDD,A
IDD,A
— 2.7
3.0
mA AVDD pin only
IDD,D
IDD,D — 1.2 2.0 mA DVDD pin only
Note 1: Measurement error = (Energy Measured By Device - True Energy)/True Energy * 100%. Accuracy is
measured with signal (±660 mV) on Channel 1. FOUT0, FOUT1 pulse outputs. Valid from 45 Hz to 65 Hz.
See Section 2.0 “Typical Performance Curves” for higher frequencies and increased dynamic range.
2: Does not include internal VREF. Gain = 1, CH0 = 470 mVDC, CH1 = 660 mVDC, difference between
measured output frequency and expected transfer function.
3: Percent of HFOUT output frequency variation; Includes external VREF = 2.5V, CH1 = 100 mVRMS @
50 Hz, CH2 = 100 mVRMS @ 50 Hz, AVDD = 5V + 1Vpp @ 100 Hz. DC PSRR: 5V ±500 mV.
4: Error applies down to 60° lead (PF = 0.5 capacitive) and 60° lag (PF = 0.5 inductive).
5: Refer to Section 4.0 “Device Overview” for complete description.
www.DataSheet4U6:.comSpecified by characterization, not production tested.
7: 1 MCLK period at 3.58 MHz is equivalent to less than <0.005 degrees at 50 or 60 Hz.
8: Gain error match is measured from CH0 G = 1 to any other gain setting.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = 4.5V – 5.5V, AGND, DGND = 0V.
Parameters
Sym
Min Typ Max Units
Conditions
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
TA -40 — +85 °C
TA -40 — +125 °C Note
TA -65 — +150 °C
Thermal Resistance, 24L-SSOP
θJA — 73 — °C/W
Note: The MCP3905/06 operate over this extended temperature range, but with reduced performance. In any
case, the Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150°C.
DS21948E-page 4
© 2009 Microchip Technology Inc.

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MCP3905/06
TIMING CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 4.5V – 5.5V,
AGND, DGND = 0V, MCLK = 3.58 MHz; TA = -40°C to +85°C.
Parameter
Sym Min Typ Max Units
Comment
Frequency Output
FOUT0 and FOUT1 Pulse Width
(Logic-Low)
tFW 275 ms 984376 MCLK periods
(Note 1)
HFOUT Pulse Width
tHW 90 — ms 322160 MCLK periods
(Note 2)
FOUT0 and FOUT1 Pulse Period
HFOUT Pulse Period
FOUT0 to FOUT1 Falling-Edge Time
FOUT0 to FOUT1 Min Separation
FOUT0 and FOUT1 Output High Voltage
FOUT0 and FOUT1 Output Low Voltage
HFOUT Output High Voltage
HFOUT Output Low Voltage
High-Level Input Voltage
(All Digital Input Pins)
tFP
tHP
tFS2
tFS
VOH
VOL
VOH
VOL
VIH
Refer to Equation 4-1
Refer to Equation 4-2
0.5 tFP
4/MCLK
4.5
— — 0.5
4.0
— — 0.5
2.4
s
s
V IOH = 10 mA, DVDD = 5.0V
V IOL = 10 mA, DVDD = 5.0V
V IOH = 5 mA, DVDD = 5.0V
V IOL = 5 mA, DVDD = 5.0V
V DVDD = 5.0V
Low-Level Input Voltage
(All Digital Input Pins)
VIL — — 0.85 V DVDD = 5.0V
Input Leakage Current
Pin Capacitance
— — ±3
µA VIN = 0, VIN = DVDD
— — 10 pF Note 3
Note 1:
2:
3:
If output pulse period (tFP) falls below 984376*2 MCLK periods, then tFW = 1/2 tFP.
If output pulse period (tHP) falls below 322160*2 MCLK periods, then tHW = 1/2 tHP.
Specified by characterization, not production tested.
www.DataSheet4U.com FOUT0
FOUT1
tFW
tFS2
tFP
tFS
HFOUT
tHW
tHP
NEG
FIGURE 1-1:
Output Timings for Pulse Outputs and Negative Power Pin.
© 2009 Microchip Technology Inc.
DS21948E-page 5