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®
Rev. 1.4
LY611024
128K X 8 BIT HIGH SPEED CMOS SRAM
REVISION HISTORY
Revision
Rev. 1.0
Rev. 1.1
Rev. 1.2
Rev. 1.3
Rev. 1.4
Description
Initial Issue
Delete Icc1 Spec.
Add E/I grade
Revised VTERM to VT1 and VT2
Revised Test Condition of ISB1/IDR
Added LL Spec.
Revised Test Condition of ICC/ISB
Revised FEATURES & ORDERING INFORMATION
Lead free and green package available to Green package
available
Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS
Added packing type in ORDERING INFORMATION
Issue Date
Jul.25.2004
Sep.21.2004
Apr.7.2005
Feb.2.2009
Apr.17.2009
www.DataSheet4U.com
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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®
Rev. 1.4
LY611024
128K X 8 BIT HIGH SPEED CMOS SRAM
FEATURES
„ Fast access time : 12/15ns
„ Low power consumption:
Operating current : 50/40mA (TYP.)
Standby current : 1mA (TYP.)
2μA (TYP.) LL -version
„ Single 4.5V ~ 5.5V power supply
„ All inputs and outputs TTL compatible
„ Fully static operation
„ Tri-state output
„ Data retention voltage : 2.0V (MIN.)
„ Green package available
„ Package : 32-pin 300 mil SOJ
32-pin 8mm x 20mm TSOP-I
32-pin 8mm x 13.4mm STSOP
PRODUCT FAMILY
Product
Family
LY611024
LY611024(E)
LY611024(I)
LY611024(LL)
LY611024(LLE)
LY611024(LLI)
Operating
Temperature
0 ~ 70
-20 ~ 80
-40 ~ 85
0 ~ 70
-20 ~ 80
-40 ~ 85
Vcc Range
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
4.5 ~ 5.5V
GENERAL DESCRIPTION
The LY611024 is a 1,048,576-bit low power CMOS
static random access memory organized as 131,072
words by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The LY611024 is well designed for very high speed
system applications, and particularly well suited for
battery back-up nonvolatile memory application.
The LY611024 operates from a single power
supply of 4.5V ~ 5.5V and all inputs and outputs are
fully TTL compatible
Speed
12/15ns
12/15ns
12/15ns
12/15ns
12/15ns
12/15ns
Power Dissipation
Standby(ISB1,TYP.) Operating(Icc,TYP.)
1mA
50/40mA
1mA
50/40mA
1mA
50/40mA
2µA 50/40mA
2µA 50/40mA
2µA 50/40mA
FUNCTIONAL BLOCK DIAGRAM
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Vcc
Vss
A0-A16
DECODER
128Kx8
MEMORY ARRAY
DQ0-DQ7
I/O DATA
CIRCUIT
CE#
CE2
WE#
OE#
CONTROL
CIRCUIT
COLUMN I/O
PIN DESCRIPTION
SYMBOL
A0 - A16
DQ0 – DQ7
CE#, CE2
WE#
OE#
VCC
VSS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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®
Rev. 1.4
LY611024
128K X 8 BIT HIGH SPEED CMOS SRAM
PIN CONFIGURATION
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
SOJ
Vcc
A15
CE2
WE#
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
A11
A9
A8
A13
WE#
CE2
A15
Vcc
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LY611024
TSOP-I/STSOP
32 OE#
31 A10
30 CE#
29 DQ7
28 DQ6
27 DQ5
26 DQ4
25 DQ3
24 Vss
23 DQ2
22 DQ1
21 DQ0
20 A0
19 A1
18 A2
17 A3
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
SYMBOL
RATING
UNIT
Voltage on VCC relative to VSS
VT1 -0.5 to 6.5
V
Voltage on any other pin relative to VSS
VT2 -0.5 to VCC+0.5
V
0 to 70(C grade)
www.DaOtapSeheraett4inUg.coTmemperature
TA -20 to 80(E grade)
-40 to 85(I grade)
Storage Temperature
TSTG
-65 to 150
Power Dissipation
PD 1 W
DC Output Current
IOUT 50 mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
CE#
Standby
H
X
Output Disable
L
Read
L
Write
L
Note: H = VIH, L = VIL, X = Don't care.
CE2
X
L
H
H
H
OE#
X
X
H
L
X
WE#
X
X
H
H
L
I/O OPERATION
High-Z
High-Z
High-Z
DOUT
DIN
SUPPLY CURRENT
ISB,ISB1
ISB,ISB1
ICC
ICC
ICC
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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®
Rev. 1.4
LY611024
128K X 8 BIT HIGH SPEED CMOS SRAM
DC ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL TEST CONDITION
Supply Voltage
Input High Voltage
Input Low Voltage
VCC
VIH*1
VIL*2
Input Leakage Current
ILI VCC VIN VSS
Output Leakage
Current
ILO
VCC VOUT VSS,
Output Disabled
Output High Voltage
VOH IOH = -4mA
Output Low Voltage
VOL IOL = 8mA
Average Operating
Power supply Current
Standby Power
Supply Current
ICC
Cycle time = Min.
CE# = VIL and CE2 = VIH,
II/O = 0mA
Others at VIL or VIH
- 12
- 15
ISB
CE# = VIH or CE2 = VIL
Others at VIL or VIH
CE# VCC-0.2V
or CE20.2V
Normal
ISB1 CE# VCC-0.2V
or CE20.2V
LL
Others at 0.2V or VCC-0.2V
Notes:
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at VCC = VCC(TYP.) and TA = 25
MIN.
4.5
2.4
- 0.5
-1
-1
2.4
-
-
TYP. *4 MAX.
5.0 5.5
- VCC+0.5
- 0.8
-1
-1
--
- 0.4
50 80
UNIT
V
V
V
µA
µA
V
V
mA
- 40 65 mA
- 3 20 mA
- 1 5 mA
- 2 50 µA
CAPACITANCE (TA = 25, f = 1.0MHz)
www.DataSheet4U.com PARAMETER
SYMBOL
MIN.
Input Capacitance
CIN -
Input/Output Capacitance
CI/O
-
Note : These parameters are guaranteed by device characterization, but not production tested.
MAX
6
8
UNIT
pF
pF
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0.2V to VCC - 0.2V
3ns
1.5V
CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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®
Rev. 1.4
LY611024
128K X 8 BIT HIGH SPEED CMOS SRAM
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
SYM.
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
LY611024-12
MIN.
MAX.
12 -
- 12
- 12
-6
3-
0-
-6
-6
3-
(2) WRITE CYCLE
PARAMETER
SYM.
LY611024-12
MIN.
MAX.
Write Cycle Time
tWC 12 -
Address Valid to End of Write
tAW
10 -
Chip Enable to End of Write
tCW
10 -
Address Set-up Time
tAS 0 -
Write Pulse Width
tWP 9 -
Write Recovery Time
tWR 0 -
Data to Write Time Overlap
tDW
7-
Data Hold from End of Write Time tDH
0-
Output Active from End of Write
tOW*
3-
Write to Output in High-Z
tWHZ*
-7
*These parameters are guaranteed by device characterization, but not production tested.
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LY611024-15
MIN.
MAX.
15 -
- 15
- 15
-7
4-
0-
-7
-7
3-
LY611024-15
MIN.
MAX.
15 -
12 -
12 -
0-
10 -
0-
8-
0-
4-
-8
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4