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Flexible Double-Ended Voltage-Mode PWM Controller
with Voltage Feed Forward
ISL6740A
The ISL6740A is an enhanced ISL6740 PWM controller
featuring built-in voltage feed forward functionality. It is pin
and feature compatible with the ISL6740 double-ended pulse
width modulating (PWM) voltage-mode controller, allowing
easy drop-in replacement on existing designs.
Voltage feed forward compensates for input voltage variation
without intervention of the feedback control loop. It is
particularly useful in unregulated bus converters and DC
transformers where wide input voltage variation would
otherwise result in large output voltage swings.
In addition to voltage feed forward compensation, the
ISL6740A features an extremely flexible oscillator that allows
precise control of frequency, duty cycle, and deadtime.
Deadtimes of under 40ns are easily achievable.
This advanced BiCMOS design features low operating current,
adjustable switching frequency up to 1MHz, adjustable
soft-start, internal and external over-temperature protection,
fault annunciation, and a bidirectional SYNC signal that allows
the oscillator to be locked to paralleled units or to an external
clock for noise sensitive applications.
Ordering Information
PART
NUMBER
(Notes 1, 2, 3)
PART
TEMP.
MARKING RANGE (°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL6740AIVZA 6740 AIVZ -40 to +105 16 Ld TSSOP M16.173
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-
free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is
RoHS compliant and compatible with both SnPb and Pb-free
soldering operations). Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-
free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information
page for ISL6740A. For more information on MSL please see
techbrief TB363.
Features
• Input Voltage Feed Forward Compensation
• Precision Duty Cycle and Deadtime Control
• Adjustable Delayed Overcurrent Shutdown and Re-Start
• Adjustable Short Circuit Shutdown and Re-Start
• Adjustable Oscillator Frequency Up to 2MHz
• Bidirectional Synchronization
• Adjustable Input Undervoltage Lockout/Inhibit
• Tight Tolerance Voltage Reference Over Line, Load, and
Temperature
• Adjustable Soft-Start
• Fault Signal
• 95µA Startup Current
• Internal Over-Temperature Protection
• System Over-Temperature Protection Using a Thermistor or
Sensor
• Pb-free and ELV, WEEE, RoHS Compliant
Applications
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
• Industrial Power Systems
• DC Transformers and Bus Converters
Pin Configuration
ISL6740A
(16 LD TSSOP)
TOP VIEW
OUTA 1
GND 2
SCSET 3
CT 4
SYNC 5
CS 6
VERROR 7
UV/FF 8
16 OUTB
15 VREF
14 VDD
13 RTD
12 RTC
11 OTS
10 FAULT
9 SS
February 9, 2012
FN9195.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2005, 2011, 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

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Functional Block Diagram
VDD
VREF
SYNC
GND
UV/FF
BG
+
-
+
-
VREF
5.00 V
1%
ENABLE
100
4.5 k
Internal
OT Shutdown
130 - 150 C
1.00 V
INHIBIT/VIN UV
+
-
INHIBI
T
N_SYNC OUT
Bi-Directional
Synchronization SYNC IN
EXT. SYNC
RTC
RTD
IRTC
IRTD
SCSET
CT
Oscillator
CLK
Short Circuit
Detection
SS DONE
CS
VERROR
OTS
0.4
0.4
0.6 V
+
-
OC DETECT
PWM
COMPARATOR
+
-
-
0.5
SS
FL
Q
T
Q
PWM TOGGLE
SC S/D
SS LOW
SQ
RQ
SC LATCH
-
+
4.5 V
SS CLAMP
SS DONE
300k
OC S/D
OC LATCH
SQ
RQ
OUTA
OUTB
VREF
70μA
ON
15μA
SS
Q
Q
50µs
RETRIGGERABLE
ONE SHOT
SQ
RQ
PWM LATCH
RESET
DOMINANT
VREF/2
-
+
INHIBIT
SS HI
+
-
4.25 V
SS LOW
+ 0.27 V
-
FAULT LATCH
SET DOMINANT
SQ
FL
RQ
SC S/D
OC S/D
VREF UV 4.65 V
-
+
BG +-
VREF
FAULT

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Typical Application - 48V Input Bus Converter, 9V @ 10A Output
VIN+
Q1
C2
QR1
T1
C1
T2
R2 Q2
QR2
C11
L1
+9V
RTN
36-75V
R1
VIN-
CR1
CR2
C3
U1
1 VDD LO 8
2 HB VSS 7
3 HO
LI 6
4 HS
HI 5
C5
C4
R3
R4
R5
Q3
VR1
R6
C6
R12
R13
U3
1 OUTA
OUTB 16
2 GND
VREF 15
3 SCSET
VDD 14
4 CT
RTD 13
5 SYNC
6 CS
RTC 12
OTS 11
7 VERROR FAULT 10
8 UV/FF
SS 9
R11
R8
RT1
SYNC
FAULT
R7 R9 R10
C7
C8 C9
C10

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Typical Application - 36 to 75 V Input, Regulated 12V @ 8A Output
VIN+
C2
Q1
CR3
T1
R22 QR1
C11
L1
C1
36-75V
R1
VIN-
CR4
T2
QR2
R2 Q2
R23
R21
CR1
CR2
R17 R19
R20
C12
C13
R18
C3
R14
U1
1 VDD LO 8
2 HB
VSS 7
3 HO
LI 6
4 HS
HI 5
C5
R13
U2
U3
2801-1
VR2
R16
C14
U4
TL431
R15
C4
R3
SYNC
R4
R5
Q3
1 OUTA
2 GND
3 SCSET
4 CT
5 SYNC
6 CS
7 VERROR
8 UV/FF
OUTB 16
VREF 15
VDD 14
RTD 13
RTC 12
OTS 11
FAULT 10
SS 9
R12
SYNC
R8
RT1
VR1
R6
C6
R7
C7
C8 C9
C10
R9 R10 R11
+12V
RTN
SYNC I/O
FAULT

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ISL6740A
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V
OUTA, OUTB, Signal Pins . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VREF
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V to 6.0V
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5A
ESD Classification
Human Body Model (Per MIL-STD-883 Method 3015.7) . . . . . . . . 1500V
Charged Device Model (Per EOS/ESD DS5.3, 4/14/93). . . . . . . . 1000V
Thermal Information
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
16 Ld TSSOP (Notes 4, 5) . . . . . . . . . . . . . .
98
30
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . -55°C to 150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . . . -65°C to 150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range
ISL6740AIVx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 105°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . . . . . . 9VDC - 16 VDC
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For θJC, the “case temp” location is taken at the package top center.
6. All voltages are with respect to GND.
Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to “Functional Block Diagram” on
page 2 and Typical Application Schematics on page 3 and page 4. 9V < VDD < 20 V, RTD = 51.1kΩ, RTC = 10kΩ, CT = 470pF, TA = -40°C to 105°C,
Typical values are at TA = 25°C. Boldface limits apply over the operating temperature range, -40°C to +105°C.
PARAMETER
TEST CONDITIONS
MIN MAX
(Note 7) TYP (Note 7) UNITS
SUPPLY VOLTAGE
Start-Up Current, IDD
Operating Current, IDD
UVLO START Threshold
VDD < START Threshold
RLOAD, COUTA,B = 0
COUTA,B = 1nF
-
-
-
6.50
95
5.0
7.0
7.25
140
8.0
12.0
8.00
µA
mA
mA
V
UVLO STOP Threshold
6.00
6.75
7.50
V
Hysteresis
0.35
0.50
0.75
V
REFERENCE VOLTAGE
Overall Accuracy
Long Term Stability
Fault Voltage
IVREF = 0, -20mA
TA = 125°C, 1000 hours
4.900
-
4.10
5.000
3
4.55
5.050
-
4.75
V
mV
V
VREF Good Voltage
4.25
4.75
VREF
-0.05
V
Hysteresis
75 165 250 mV
Operational Current (Source)
-20 -
- mA
Operational Current (Sink)
5 - - mA
Current Limit
-25
-
-100
mA
CURRENT SENSE
Current Limit Threshold
CS to OUT Delay
VERROR = VREF
0.55 0.6 0.65
- 35 50
V
ns
CS Sink Current
- 10 - mA
Input Bias Current
-1.00
-
1.00
µA
SCSET Input Impedance
1 - - MΩ
5 FN9195.3
February 9, 2012