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®
Data Sheet
July 25, 2005
ISL6742
www.DataSheet4U.com
FN9183.1
Advanced Double-Ended PWM Controller
The ISL6742 is a high-performance double-ended PWM
controller with advanced synchronous rectifier control and
current limit features. It is suitable for both current- and
voltage-mode control methods.
The ISL6742 includes complemented PWM outputs for
synchronous rectifier (SR) control. The complemented
outputs may be dynamically advanced or delayed relative to
the main outputs using an external control voltage.
Its advanced current sensing circuitry employs sample and
hold methods to provide a precise average current signal.
Suitable for average current limiting, a technique which
virtually eliminates the current tail-out common to peak
current limiting methods, it is also applicable to current
sharing circuits and average current mode control.
This advanced BiCMOS design features an adjustable
oscillator frequency up to 2MHz, internal over-temperature
protection, precision deadtime control, and short
propagation delays. Additionally, Multi-Pulse Suppression
ensures alternating output pulses at low duty cycles where
pulse skipping may occur.
Ordering Information
TEMP. RANGE
PKG. DWG.
PART NUMBER
(°C)
PACKAGE
#
ISL6742AAZA
(See Note)
-40 to 105
16 Ld QSOP M16.15A
(Pb-free)
Add -T suffix to part number for tape and reel packaging
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pinout
ISL6742 (QSOP)
TOP VIEW
VREF 1
VERR 2
RTD 3
CT 4
FB 5
RAMP 6
CS 7
IOUT 8
16 SS
15 VADJ
14 VDD
13 OUTA
12 OUTB
11 OUTAN
10 OUTBN
9 GND
Features
• Synchronous Rectifier Control Outputs with Adjustable
Delay/Advance
• Adjustable Average Current Signal
• 3% Tolerance Cycle-by-Cycle Peak Current Limit
• Fast Current Sense to Output Delay
• Adjustable Oscillator Frequency Up to 2MHz
• Adjustable Deadtime Control
• Voltage- or Current-Mode Operation
• Separate RAMP and CS Inputs for Voltage Feed Forward
or Current-Mode Applications
• Tight Tolerance Error Amplifier Reference Over Line,
Load, and Temperature
• 175µA Start-up Current
• Supply UVLO
• Adjustable Soft-Start
• 70ns Leading Edge Blanking
• Multi-Pulse Suppression
• Internal Over Temperature Protection
• Pb-free and ELV, WEEE, RoHS Compliant
Applications
• Half-Bridge, Full-Bridge, Interleaved Forward, and Push-
Pull Converters
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
• Industrial Power Systems
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Functional Block Diagram
VDD
GND
VREF
IOUT
UVLO
OVER-
TEMPERATURE
PROTECTION
4X
VREF
SAMPLE
AND
HOLD
CT
RTD
SS
OSCILLATOR
VREF
PWM
STEERING
LOGIC
VDD
DELAY/
ADVANCE
TIMING
CONTROL
+
- 1.00V
OVER CURRENT
COMPARATOR
+70 nS
LEADING
EDGE
BLANKING
OUTA
OUTB
OUTAN
OUTBN
VADJ
CS
PWM
COMPARATOR
+
-
80mV
0.33
SOFTSTART
CONTROL
VREF
1 mA
RAMP
+ 0.6V
-
VERR
FB

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Typical Application - Telecom Primary Side Control Half-Bridge Converter with Synchronous Rectification
VIN+
C1
36-75V
VIN-
C2
CR3
C3
Q1
R1 Q2
C7
C4
C5
U1
HIP2100
VDD LO
HB VSS
HO LI
HS HI
R3
R2
Q7 C8
C15
R13
T2
C14
T1
R17
C17
R9
CR1
CR2
R8
R7
Q3 Q5
Q4 Q6
C13
R5
R6
U2
ISL6742
1 VREF
SS 16
2 VERR
VADJ 15
3 RTD
VDD 14
4 CT
OUTA 13
5 FB
OUTB 12
6 RAMP
OUTAN 11
7 CS
OUTBN 10
8 IOUT
GND 9
R11
VR1
C6
R4 C9
R10
C10
C11
R12
C16
R16
EL7212
U6
R15
CR4
R14
C12
L1 +VOUT
+
C22
C23
RTN
R25
T3
C18
EL7212
U5
C24
R19
R18
+VOUT
R23
R20
C20
R22
C19
U3
VR2
R21
C21
U4
TL431
R24

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Typical Application - High Voltage Input Secondary Side Control Full-Bridge Converter
VIN+
Q1 CR4
CR3
Q2
Q5A
R13
T3
R14 Q6A
Q5B
Q6B
C9 C10
400 VDC
+
C1
Q4
Q7A
R12
Q7B
CR6
C8
R15
C11
CR5
R11
C7
Q8A
Q8B
Q3
VIN-
SECONDARY
BIAS SUPPLY
Q11A
Q11B
C6
Q12A
Q12B
T2
CR1
CR2
VREF
Q15
R9
R6
R21
C12
R7
R8
C3
C2
R2 R3
C4
C5
R5
1 VREF
2 VERR
3 RTD
4 CT
5 FB
6 RAMP
7 CS
8 IOUT
SS 16
VADJ 15
VDD 14
OUTA 13
OUTB 12
OUTAN 11
OUTBN 10
GND 9
U1
C13
R10
C14
R4
C15
T1
R17
C18
Q16
Q15
R16
L1
C19 C20 C21 +
+ Vout
RETURN
Q13A
Q13B
Q14A
Q14B
VREF
R22
R23
R20
C17
C16 R18
CR7
-
+
U3
R19
C22

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ISL6742
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V
OUTxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VDD
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VREF + 0.3V
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 6.0V
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1A
ESD Classification
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .2000V
Charged Device Model (Per EOS/ESD DS5.3, 4/14/93) . . .1000V
Thermal Information
www.DataSheet4U.com
Thermal Resistance Junction to Ambient (Typical)
θJA (°C/W)
16 Lead QSOP (Note 1). . . . . . . . . . . . . . . . . . . . . .
95
Maximum Junction Temperature . . . . . . . . . . . . . . . . -55°C to 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
(QSOP- Lead Tips Only)
Operating Conditions
Temperature Range
ISL6742AAxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 105°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . . . 9-16 VDC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are with respect to GND.
Electrical Specifications
PARAMETER
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0k, CT = 470pF, TA = -40°C to 105°C (Note 3), Typical values are at
TA = 25°C
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY VOLTAGE
Supply Voltage
- - 20 V
Start-Up Current, IDD
Operating Current, IDD
UVLO START Threshold
VDD = 5.0V
RLOAD, COUT = 0
-
-
8.00
175
7.5
8.75
400
12.0
9.00
µA
mA
V
UVLO STOP Threshold
6.50 7.00 7.50
V
Hysteresis
- 1.75 -
V
REFERENCE VOLTAGE
Overall Accuracy
Long Term Stability
Operational Current (source)
IVREF = 0 - 10mA
TA = 125°C, 1000 hours (Note 4)
4.850
-
-10
5.000
3
-
5.150
-
-
V
mV
mA
Operational Current (sink)
5 - - mA
Current Limit
VREF = 4.85V
-15
-
-100
mA
CURRENT SENSE
Current Limit Threshold
VERR = VREF
0.97 1.00 1.03
V
CS to OUT Delay
Excl. LEB (Note 4)
- 35 50 ns
Leading Edge Blanking (LEB) Duration
(Note 4)
50 70 100 ns
CS to OUT Delay + LEB
CS Sink Current Device Impedance
Input Bias Current
IOUT Sample and Hold Buffer Amplifier Gain
IOUT Sample and Hold VOH
IOUT Sample and Hold VOL
TA = 25°C
VCS = 1.1V
VCS = 0.3V
TA = 25°C
VCS = 1.00V, ILOAD = -300µA
VCS = 0.00V, ILOAD = 10µA
- - 130 ns
- - 20
-1.0 - 1.0 µA
4.00 4.09 4.15 V/V
3.9 - - V
- - 0.3 V
5 FN9183.1
July 25, 2005