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®
Data Sheet
September 11, 2008
ISL6745A
www.DataSheet4U.com
FN6703.1
Improved Bridge Controller with Precision
Dead Time Control
The ISL6745A is a low-cost double-ended voltage-mode
PWM controller designed for half-bridge and full-bridge
power supplies and line-regulated bus converters. It
provides precise control of switching frequency, adjustable
soft-start, and overcurrent shutdown. In addition, the
ISL6745A allows for accurate adjustment of MOSFET
non-overlap time (“deadtime”) with deadtimes as low as
35ns, allowing power engineers to optimize the efficiency of
open-loop bus converters. The ISL6745A also includes a
control voltage input for closed-loop PWM and line voltage
feed-forward functions. The ISL6745A is identical to the
ISL6745, but is optimized for higher noise environments.
Low start-up and operating currents allow for easy biasing in
both AC/DC and DC/DC applications. This advanced
BiCMOS design also features adjustable switching
frequency up to 1MHz, 1A FET drivers, and very low
propagation delays for a fast response to overcurrent faults.
The ISL6745A is available in a space-saving MSOP-10
package and is guaranteed to meet rated specifications over
a wide -40°C to +105°C temperature range.
Ordering Information
PART
NUMBER
(Note)
PART
MARKING
TEMP.
RANGE
(°C)
PACKAGE PKG.
(Pb-Free) DWG. #
ISL6745AAUZ* 6745A
-40 to +105 10 Ld MSOP M10.118
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
Features
• Precision Duty Cycle and Deadtime Control
• 100µA Start-up Current
• Adjustable Delayed Overcurrent Shutdown and Re-Start
• Adjustable Oscillator Frequency Up to 2MHz
• 1A MOSFET Gate Drivers
• Adjustable Soft-Start
• Internal Over-Temperature Protection
• 35ns Control to Output Propagation Delay
• Small Size and Minimal External Component Count
• Input Undervoltage Protection
• Pb-Free (RoHS Compliant)
Applications
• Half-bridge Converters
• Full-bridge Converters
• Line-regulated Bus Converters
• AC/DC Power Supplies
• Telecom, Datacom, and File Server Power
Pinout
ISL6745A
(10 LD MSOP)
TOP VIEW
SS 1
RTD 2
VERR 3
CS 4
CT 5
10 VDD
9 VDDP
8 OUTB
7 OUTA
6 GND
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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Internal Architecture
VDD
GND
UVLO
+
-
INTERNAL
BG OT SHUTDOWN
130°C - 150°C
VBIAS
5.00V
VBIAS
RTD
IRTD
VBIAS
160µA
ON
CT
2.0V
2.8V
0.8V
- PEAK
+
- VALLEY
+
S Q CLK
RQ
RESET
DOMINANT
IDCH
ON
CS
VERR
VBIA
CT
S
15µA
0.8
0.6V
+
-
OC DETECT
PWM COMPARATOR
+
--
SS
0.8
FL
Q
T
Q
PWM TOGGLE
SS CLAMP
-
+
VBIAS
4.0V
+
-
SS CHARGED
SQ
RQ
OC LATCH
VDDP
VBIAS
ON
+
-
3.9V
OUTA
OUTB
70µA
SS
15µA
Q
50µs Q
RETRIGGERABLE
ONE SHOT
SQ
RQ
PWM LATCH
SET
DOMINANT
SS LOW
+ 0.27V
-
FAULT LATCH SS
SET DOMINANT
S Q FL
RQ
VBIAS UV
4.65V 4.80V
-
+
BG
VBIAS

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Typical Application - Telecom DC/DC Converter
VIN+
36V TO 75V
(100V Max.)
C1
C2
VIN-
R1
Q3
VR1
U2
ISL2100A
1 VDD LO 8
2 HB VSS 7
C6
3 HO
LI 6
4 HS
HI 5
U1
ISL6745A
1 SS VDD 10
2 RTD VDDP 9
3 VERROUTB 8
4 CS OUTA 7
5 CT GND 6
R3
C2 R2 C3
C4
R4
C5
Q1
T1
CR1
+ VOUT
+
C10
CR2
T2
Q2
L1 RETURN
CR3 CR4
VR2 R5
R6
U3
C9
R10
R7
C8
R11
C7 R8
U4
TL431
R9

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ISL6745A
Absolute Maximum Ratings
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . GND - 0.3V to +20.0V
OUTA, OUTB . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VDD
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 5V
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1A
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Supply Voltage Range (Typical). . . . . . . . . . . . . . . . . . . . 9V to 16V
Thermal Information
www.DataSheet4U.com
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
10 Lead MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
155
Maximum Junction Temperature . . . . . . . . . . . . . . .-55°C to +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are to be measured with respect to GND, unless otherwise specified.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram on page 2 and Typical
Application schematic on page 3. 9V < VDD < 16V, RTD = 51.1kΩ, CT = 470pF, TA = -40°C to +105°C, Typical
values are at TA = +25°C; Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise
specified. Temperature limits established by characterization and are not production tested.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY VOLTAGE
Start-Up Current, IDD
Operating Current, IDD
UVLO START Threshold
VDD< START Threshold
COUTA,B = 1nF
- - 175 µA
- 5 8.5 mA
5.9 6.3 6.6
V
UVLO STOP Threshold
5.3 5.7 6.3
V
Hysteresis
- 0.6 -
V
CURRENT SENSE
Current Limit Threshold
0.55 0.6 0.65
V
CS to OUT Delay
(Note 3)
- 35 - ns
CS Sink Current
8 10 - mA
Input Bias Current
-1 -
1 µA
PULSE WIDTH MODULATOR
Minimum Duty Cycle
Maximum Duty Cycle
VERR to PWM Comparator Input Gain
CT to PWM Comparator Input Gain
SS to PWM Comparator Input Gain
VERROR < CT Offset
- - 0%
CT = 470pF, RTD = 51.1kΩ
- 94 - %
CT = 470pF, RTD = 1.1kΩ (Note 3)
-
99
-
%
- 0.8 - V/V
(Note 3)
- 1 - V/V
(Note 3)
- 0.8 - V/V
OSCILLATOR
Charge Current
RTD Voltage
Discharge Current Gain
TA = +25°C
143 156 170 µA
1.925 2 2.075 V
45 - 65 µA/µA
CT Valley Voltage
CT Peak Voltage
0.75
2.70
0.8
2.80
0.85
2.90
V
V
4 FN6703.1
September 11, 2008

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ISL6745A
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagrwamwwon.DpaagtaeS2heanedt4TUy.pciocaml
Application schematic on page 3. 9V < VDD < 16V, RTD = 51.1kΩ, CT = 470pF, TA = -40°C to +105°C, Typical
values are at TA = +25°C; Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise
specified. Temperature limits established by characterization and are not production tested. (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SOFT-START
Net Charging Current
45 - 68 µA
SS Clamp Voltage
3.8 4.0 4.2
V
Overcurrent Shutdown Threshold Voltage
(Note 3)
- 3.9 -
V
Overcurrent Discharge Current
12 15 23 µA
Reset Threshold Voltage
0.25 0.27 0.31
V
OUTPUT
High Level Output Voltage (VOH)
Low Level Output Voltage (VOL)
Rise Time
Fall Time
THERMAL PROTECTION
VDD - VOUTA or VOUTB,
IOUT = -100mA
IOUT = 100mA
CGATE = 1nF, VDD = 12V
CGATE = 1nF, VDD = 12V
-
0.5 2.0
V
-
0.5 1.0
V
- 17 60 ns
- 20 60 ns
Thermal Shutdown
(Note 3)
- 145 -
°C
Thermal Shutdown Clear
(Note 3)
- 130 -
°C
Hysteresis, Internal Protection
(Note 3)
- 15 - °C
NOTES:
3. Limits established by characterization and are not production tested.
5 FN6703.1
September 11, 2008