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AIE Adaptive Image Enhancer Series
Real Time
Video Processor ICs
BU1572GUW, BU1573KV, BU1574KU
No.09060EBT02
Description
BU1572GUW/BU1573KV/BU1574KU is AIE : Adaptive Image Enhancer (image processing technology by ROHM’s
hardware). Camera video images are optimized for maximum visibility.
Features
1) Compatible with image data from QCIF size (176 144) up to WVGA+ size (864 480)
2) Compatible with 80-system CPU bus interface and RGB interface.(BU1572GUW/BU1573KV)
3) Compatible with Input/Output data formats with RGB 5:6:5 and 6:6:6.(BU1572GUW/BU1573KV)
4) Multiple operation modes: Image Enhance, Analysis, Through and Sleep. *1
5) Two selectable register settings: indirect addressing through the 80-system CPU bus interface
or the 2-wire serial interface (I2C) *2
6) PWM output for image adjustment LCD backlight control.
7) Built-in edge-enhancement and gamma filters.
*1: BU1574KU is an analysis mode setting interdiction.
*2: BU1574KU becomes only the register set by the two-wire system serial interface.
Extra document is prepared separately about each register setup. Please refer to the Development Scheme on page 10.
Application
Portable media player, Mobile phone, car display, Car navigation system, and portable DVD etc.
Lineup
Parameter
BU1572GUW
BU1573KV
BU1574KU
Supply power
source voltage
1.4-1.6(VDDCore)
1.65-3.3(VDDIo)
1.4-1.6(VDDCore)
2.7-3.6(VDDIo)
1.4-1.6(VDDCore)
2.7-3.6(VDDIo)
Input
Interface
Control
Interface
Supported up to Max
WVGA+(864×480)
Supported up to Max
WVGA+(864×480)
I2C BUS
(At RGB interface)
I2C BUS
(At RGB interface)
Supported up to Max
WVGA+(864×480)
I2C BUS
Output
Interface
18bit RGB interface
or bus interface
18bit RGB interface
or bus interface
8bit YUV=4:2:2 parallel
CCIR601
CCIR656
PWM Output
Image adjustment
PWM output
Image adjustment
PWM output
image adjustment
PWM output
Package
VBGA063W050
VQFP64
UQFP64
Absolute maximum ratings (Ta=25)
Recommended operating range
Parameter
Symbol
Rating
Unit
Parameter
Symbol
Rating
Unit
Supply power
source voltage 1
VDDIO
-0.3+4.2
V
Supply power source
voltage 1IO
VDDIO
1.653.30(Typ:2.85V) *1
V
Supply power
source voltage 2
VDD
-0.3+2.1
V
Supply power source
voltage 2CORE
VDD
1.401.60(Typ:1.50V)
V
Input voltage
VIN -0.3VDDIO+0.3 V
Input voltage range VIN-VDDIO
0VDDIO
V
Storage
temperature range
Tstg
-40+125
Operating
temperature range
Topr
-20+70 *2
Power dissipation
PD
310 *1
mW
*Please supply power source in order of VDDVDDIO.
*In the case exceeding 25ºC, 3.1mW should be reduced at the rating 1ºC.
(BU1573KV: 7.5mW / BU1574KU: 7mW should be reduced at the rating.)
*1: BU1573KV is 750mW, and BU1574KU is 700mW.
*1 : BU1573KV and BU1574KU correspond to 2.703.60V(Typ:3.00V)
*2 : BU1573KV and BU1574KU correspond to –40+85
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© 2009 ROHM Co., Ltd. All rights reserved.
1/12
2009.04- Rev.B

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BU1572GUW, BU1573KV, BU1574KU
Technical Note
www.DataSheet4U.com
●Electric characteristics
(Unless otherwise specified, VDD=1.50V,VDDIO=2.85V,GND=0.0V,Ta=25,fIN=36.0MHz) *1
Parameter
Symbol
MIN.
Limits
TYP.
MAX.
Unit
Condition
Input frequency
IN
-
-
36.0
MHz DCKI (DUTY45%55%) *2
Operating consumption current IDD1
-
24
- mA At enhance mode setting (36MHz)
Static consumption current
IDDst
-
- 30 μA At sleep mode setting, input terminal=GND setting
Input ”H” current
IIH -10 - 10 μA VIH=VDDIO
Input ”L” current
IIL -10 - 10 μA VIL=GND
Input ”H” voltage 1
VIH1
VDDIO
0.8
-
VDDIO
+0.3
V Normal input (including input mode of I/O terminal)
Input ”L” voltage 1
VIL1
-0.3
-
VDDIO
0.2
V Normal input (including input mode of I/O terminal)
Input ”H” voltage 2
VIH2
VDDIO
0.85
-
VDDIO
+0.3
Hysteresis input *3
V (RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC,
LCDRDBI/I2CDEV0)
Input ”L” voltage 2
VIL2
-0.3
-
VDDIO
0.15
Hysteresis input *4
V (RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC,
LCDRDBI/I2CDEV0)
Hysteresis input *5
Hysteresis voltage width
Vhys
-
0.7
-
V (RESETB, DCKI, LCDCSBI/SDA, LCDWRBI/SDC,
LCDRDBI/I2CDEV0)
Output ”H” voltage
VOH
VDDIO
-0.4
-
VDDIO
V
IOH=-1.0mA(DC)
(including output mode of I/O terminal)
Output ”L” voltage
VOL
0.0
-
0.4
V
IOL=1.0mA(DC)
(including output mode of I/O terminal)
*1 : VDDIO=3.00V in case of BU1573KV / BU1574KU
*2 : CAMCKI in case of BU1574KU
*3,*4,*5 : It corresponds with RESETB CAMCKI SDA SDC I2CDEV0 for BU1574KU
Block Diagram
BU1572GUW/BU1573KV
BU1574KU
LCDDI[17:0]
Color correction
Luminance
distinction
Image enhance
CAMDI[17:0]
LCDDO[17:0]
Color correction
Luminance
distinction
Image enhance
CAMDO[17:0]
LCDRS0/1I
LCDCSBI
LCDWRBI
LCDRDBI
SDA
SDC
LCDVSI
LCDHSI
VLDI
ENAI
DCKI
MSEL0/1/2
RESETB
Register
I2C interface
Timing generator
Edge
enhancement
Gamma control
PWM control
generation
PWMO
LCDRS0O
LCDCSBO
LCDWRBO
LCDVSO
LCDHSO
VLDO
ENAO
DCKO
SDA
SDC
CAMVSI
CAMHSI
CAMCKI
MSEL0/1/2
RESETB
Register
I2C interface
Timing generator
Edge
enhancement
Gamma control
PWM control
generation
PWMO
CAMVSO
CAMHSO
CAMCKO
Recommended Application Circuit
BU1572GUW/BU1573KV
CPU
LCDDATA[17:0]
LCDRS/
LCDCSB/
LCDWRB
LCDRDB
VSYNC/
HSYNC/
DOTCLOCK
SDA/SDC
BU1572GUW/BU1573KV
LCDDI[17:0]
LCDDO[17:0]
LCDRS0I/
LCDCSBI/
LCDWRBI
LCDRS0O/
LCDCSBO/
LCDWRBO
LCDRDBI
LCDVSI/
LCDHSI/
DCKI
LCDVSO/
LCDHSO/
DCKO
SDA/SDC
PWMO
LCD Controller
D[17:0]
RS/
CSB/
WRB
RDB
VSYNC/
HSYNC/
CLK
LED Driver
PWM IN
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© 2009 ROHM Co., Ltd. All rights reserved.
Camera
Module
2/12
BU1574KU
CAMDI[7:0]
CAMHSI
CAMVSI
CAMCKI
CAMDI[7:0] CAMDO[7:0]
CAMHSI
CAMHSO
BU1574KU
CAMVSI
CAMVSO
CAMCKI
CAMCKO
CAMDO[7:0]
CAMHSO
CAMVSO
CAMCKO
Image
Processing
IC
SDA
SDC
2009.04- Rev.B

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BU1572GUW, BU1573KV, BU1574KU
Technical Note
www.DataSheet4U.com
Terminal functions (BU1572GUW/BU1573KV)
PIN PIN
No. Name
Interface Type *1
TYPE 1
TYPE 2
1 LCDVSI
LCDVSI
LCDVSI
In/Out
In
Active
Level
*
Init Description
- Vertical timing input
In/output
type
C *1
2 N.C.*2
-
LCDHSI/
3
LCDRS01
*3
LCDCSBI/
4
SDA
LCDCSBI
LCDWRDBI/
5 LCDWRBI
SDC
LCDRDBI/
6
I2CDEV0
LCDRDBI
7 LCDDI0
LCDDI0
-
LCDHSI
SDA
SDC
I2CDEV0
LCDDI0
--
In
In/Out
In
In
*
Low/
DATA
Low/
CLK
Low/ *
In/Out DATA
--
Horizontal timing input/
-
Register select input signal 0
Chip select input signal /
In
In/output serial data
Write enable input signal /
-
In/output serial clock
Read enable input signal /
-
I2C device address setting
In Data input: bit 0
-
C *1
G
D *1
D *1
H *1
8 LCDDI1
LCDDI1
LCDDI1
In/Out DATA In Data input: bit 1
H *1
9 LCDDI2
LCDDI2
LCDDI2
In/Out DATA In Data input: bit 2
H *1
10 LCDDI3
LCDDI3
LCDDI3
In/Out DATA In Data input: bit 3
H *1
11 LCDDI4
LCDDI4
LCDDI4
In/Out DATA In Data input: bit 4
H *1
12 LCDDI5
LCDDI5
LCDDI5
In/Out DATA In Data input: bit 5
H *1
13 LCDDI6
LCDDI6
LCDDI6
In/Out DATA In Data input: bit 6
H *1
14 LCDDI7
LCDDI7
LCDDI7
In/Out DATA In Data input: bit 7
H *1
15 LCDDI8
LCDDI8
LCDDI8
In/Out DATA In Data input: bit 8
H *1
16 LCDDI9
LCDDI9
LCDDI9
In/Out DATA In Data input: bit 9
H *1
17 LCDDI10
LCDDI10
LCDDI10
In/Out DATA In Data input: bit 10
H *1
18 LCDDI11
LCDDI11
LCDDI11
In/Out DATA In Data input: bit 11
H *1
19 LCDDI12
LCDDI12
LCDDI12
In/Out DATA In Data input: bit 12
H *1
20 LCDDI13
LCDDI13
LCDDI13
In/Out DATA In Data input: bit 13
H *1
21 LCDDI14
LCDDI14
LCDDI14
In/Out DATA In Data input: bit 14
H *1
22 LCDDI15
LCDDI15
LCDDI15
In/Out DATA In Data input: bit 15
H *1
23 LCDDI16
LCDDI16
LCDDI16
In/Out DATA In Data input: bit 16
H *1
24 LCDDI17
LCDDI17
LCDDI17
In/Out DATA In Data input: bit 17
H *1
25 ENAI
*3
ENAI
In * - RAM write enable input signal
C *1
26 VLDI
*3
VLDI
In * - VLD input signal
C *1
27 VDDIO
VDDIO
VDDIO
-
PWR
- DIGITAL IO power source
-
28 DCKI
DCKI
DCKI
In CLK - Clock input
D *1
29 GND
GND
GND
-
GND
- Common GROUND
-
30 VDD
VDD
VDD
-
PWR
- CORE power source
-
MSEL0/
31
LCDRS0I
LCDRS0I
MSEL0 *3
In
Mode select 0/
*-
Register select input signal 0
A
32 MSEL1/
LCDRS1I
LCDRS1I
MSEL1 *3
In
*
Mode select 1/
-
Register select input signal 1
A
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset.
*1 : It suspends during reset (initial state)
*2 : With no ball(Please connect it with GND for BU1573KV)
*3 : Please connect with GND.
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© 2009 ROHM Co., Ltd. All rights reserved.
3/12
2009.04- Rev.B

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BU1572GUW, BU1573KV, BU1574KU
Technical Note
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PIN PIN
No. Name
Interface Type *1
TYPE 1
TYPE 2
Active
In/Out
Level
Init
Description
In/output
type
33 MSEL2
MSEL2 *3 MSEL2 *4
In *
- Mode select 2
A
LCDRS0O/ LCDRS0O/
34 PWM_O(1) Out *
PWMO1 *5 PWM_O(1)
Register select output signal 0/
Low
PWM output for the LCD backlight
E
PWMO3 *5/
PWM_O(3)/
35 PWM_O(3)
VLDO
VLDO
Out
*
PWM output for the LCD backlight/
Low
VLD output signal
E
36 ENAO
-
ENAO
Out *
Low RAM write enable output signal
E
LCDDO17/
37
PWMO2 *5
LCDDO17/
PWM_O(2)
LCDDO17/
PWM_O(2)
In/Out DATA
Data output: bit 17/
Low
PWM output for the LCD backlight
F
38 LCDDO16
LCDDO16 LCDDO16
In/Out DATA Low Data output: bit 16
F
39 LCDDO15
LCDDO15 LCDDO15
In/Out DATA Low Data output: bit 15
F
40 LCDDO14
LCDDO14 LCDDO14
In/Out DATA Low Data output: bit 14
F
41 LCDDO13
LCDDO13 LCDDO13
In/Out DATA Low Data output: bit 13
F
42 LCDDO12
LCDDO12 LCDDO12
In/Out DATA Low Data output: bit 12
F
43 LCDDO11
LCDDO11 LCDDO11
In/Out DATA Low Data output: bit 11
F
44 LCDDO10
LCDDO10 LCDDO10
In/Out DATA Low Data output: bit 10
F
45 LCDDO9
LCDDO9
LCDDO9
In/Out DATA Low Data output: bit 9
F
46 LCDDO8
LCDDO8
LCDDO8
In/Out DATA Low Data output: bit 8
F
47 GND
GND
GND
- GND
- Common GROUND
-
48 LCDDO7
LCDDO7
LCDDO7
In/Out DATA Low Data output: bit 7
F
49 LCDDO6
LCDDO6
LCDDO6
In/Out DATA Low Data output: bit 6
F
50 LCDDO5
LCDDO5
LCDDO5
In/Out DATA Low Data output: bit 5
F
51 LCDDO4
LCDDO4
LCDDO4
In/Out DATA Low Data output: bit 4
F
52 LCDDO3
LCDDO3
LCDDO3
In/Out DATA Low Data output: bit 3
F
53 LCDDO2
LCDDO2
LCDDO2
In/Out DATA Low Data output: bit 2
F
54 LCDDO1
LCDDO1
LCDDO1
In/Out DATA Low Data output: bit 1
F
55 LCDDO0
LCDDO0
LCDDO0
In/Out DATA Low Data output: bit 0
F
LCDWRBO/
56 LCDWRBO I2CDEV6B *3 In/Out
I2CDEV6B
*
High/
In
Write enable output signal
F
57 LCDCSBO LCDCSBO "H" *6
Out * High Chip select output signal
E
SDA /
58
LCDHSO
-
LCDHSO
Out *
In/output serial clock/
Low
Horizontal timing output signal
G
SDC/
59
LCDVSO
-
LCDVSO
Out *
In/output serial clock/
Low
Vertical timing output signal
G
60 RESETB
RESETB
RESETB
In Low
- System reset signal
B
61 VDDIO
VDDIO
VDDIO
- PWR
- DIGITAL IO power source
-
62 DCKO
DCKO
DCKO
Out CLK
Low Clock output
E
63 GND
GND
GND
- GND
- Common GROUND
-
64 VDD
VDD
VDD
- PWR
- CORE power source
-
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under reset.
*3 : Please connect with GND
*4 : Please connect with VDDIO
*5 : It selects it according to PWMCNT register (40h).
*6 : “High”output
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© 2009 ROHM Co., Ltd. All rights reserved.
4/12
2009.04- Rev.B

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BU1572GUW, BU1573KV, BU1574KU
Terminal functions (BU1574KU)
Technical Note
www.DataSheet4U.com
PIN PIN
No. Name
In/
Out
Active
Level
Init
Descriptions
In/Output
type
1 CAMVSI
In * - Vertical timing input
C *1
2 N.C. *2
- * --
-
3 CAMHSI
In * - Horizontal timing input
C *1
4 SDA
In/Out DATA In In/Output serial data
G
5 SDC
In
CLK
- In/Output serial clock
D *1
6 I2CDEV0
In * - I2C device address setting
D *1
7 CAMDI0
In DATA - Data input: bit 0
H *1
8 CAMDI1
In DATA - Data input: bit 1
H *1
9 CAMDI2
In DATA - Data input: bit 2
H *1
10 CAMDI3
In DATA - Data input: bit 3
H *1
11 CAMDI4
In DATA - Data input: bit 4
H *1
12 CAMDI5
In DATA - Data input: bit 5
H *1
13 CAMDI6
In DATA - Data input: bit 6
H *1
14 CAMDI7
In DATA - Data input: bit 7
H *1
15 RESERVEI0 *3
In * - RESERVE
C *1
16 RESERVEI1 *3
In * - RESERVE
C *1
17 RESERVEI2 *3
In * - RESERVE
C *1
18 RESERVEI3 *3
In * - RESERVE
C *1
19 RESERVEI4 *3
In * - RESERVE
C *1
20 RESERVEI5 *3
In * - RESERVE
C *1
21 RESERVEI6 *3
In * - RESERVE
C *1
22 RESERVEI7 *3
In * - RESERVE
C *1
23 RESERVEI8 *3
In * - RESERVE
C *1
24 RESERVEI9 *3
In * - RESERVE
C *1
25 RESERVEI10 *3 In * - RESERVE
C *1
26 RESERVEI11 *3
In * - RESERVE
C *1
27 VDDIO
- PWR - DIGITAL IO power source
-
28 CAMCKI
In CLK - Clock input
D *1
29 GND
- GND - Common GROUND
-
30 VDD
- PWR - CORE power source
-
31 MSEL0 *3
In * - Mode select 0
A
32 MSEL1 *3
In * - Mode select 1
A
Change by setup by the register is possible for the "*" display in the column of an Active level. Moreover, Init is a pin state under
reset.
*1 : It suspends during reset (initial state)
*2 : Please connect with GND
*3 : Please connect with GND.
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
5/12
2009.04- Rev.B