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DATA SHEET
OKI
ASIC
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PRODUCTS
MSM30R/32R/92R
0.5µm Sea Of Gates and
Customer Structured Arrays
August 2002

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CONTENTS
Description ................................................................................................................................................................1
Features ....................................................................................................................................................................1
MSM30R/32R/92R Family Listing .......................................................................................................................2
Array Architecture ...................................................................................................................................................3
MSM92R000 CSA Layout Methodology ........................................................................................................3
Electrical Characteristics .........................................................................................................................................5
Macro Library .........................................................................................................................................................10
Macrocells for Driving Clock Trees ..............................................................................................................11
Oki Advanced Design Center Cad Tools ..........................................................................................................1 2
Design Process .................................................................................................................................................13
Automatic Test Pattern Generation ..............................................................................................................14
Floorplanning Design Flow ...........................................................................................................................14
IEEE JTAG Boundary Scan Support .............................................................................................................15
Package Options .....................................................................................................................................................16
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MSM30R/32R/92R
Second-Generation 0.5µm Sea of Gates and Customer Structured Arrays
DESCRIPTION
Oki's second-generation 0.5µm ASIC products are available in both Sea Of Gates (SOG) and Customer
Structured Array (CSA) architectures. The MSM30R Series, MSM32R Series, and MSM92R Series all offer
increased density over their first-generation counterparts, as well as 3-V I/O buffers that are 5-V tolerant.
Both the SOG-based MSM30R Series and the CSA-based MSM92R Series use a three-layer metal process
on 0.5µm drawn (0.4µm L-effective) CMOS technology. The SOG-based MSM32R Series uses the same
SOG base-array architecture as the MSM30R Series, but offers two metal layers instead of three. The
semiconductor process is adapted from Oki's production-proven 16-Mbit DRAM manufacturing process.
The second-generation 0.5µm family retains the high speed and low power of Oki’s first-generation
0.5µm MSM13R/12R/98R family. The second-generation 0.5µm family also shares the same die sizes for
arrays with corresponding I/O counts, but the second-generation arrays can contain up to 60% more
gates than their first-generation counterparts. The second-generation family is optimized for 3-V core
operation, with optimized 3-V I/O buffers and 3-V I/O buffers that are 5-V tolerant, whereas the first-
generation family offers separate I/O buffers for mixed 3-V and 5-V operation. Oki's first-generation and
second-generation 0.5µm families together offer an unusually flexible mixed-voltage ASIC capability.
The 3-layer-metal MSM30R SOG Series contains 8 array bases, offering up to 448 I/O pads and over 600K
raw gates. The 2-layer metal MSM32R SOG Series contains five array bases, offering up to 320 I/O pads
and over 300K raw gates. These SOG array sizes are designed to fit the most popular Quad Flat Pack
(QFP) and Plastic Ball Grid Array (PBGA) packages. The MSM30R and MSM32R Series’ SOG architec-
ture allows rapid prototyping turnaround times, additionally offering the most cost-effective solution for
pad-limited circuits (particularly the 2-layer metal MSM32R Series).
The 3-layer-metal MSM92R CSA Series contains 36 array bases, offering a wider span of gate and I/O
counts than SOG Series. Oki uses the EPOCH memory compiler from Cascade Design Automation to
generate optimized single- and dual-port RAM macrocells for CSA designs. As such, the MSM92R Series
is suited to memory-intensive ASICs and high-volume designs where fine tuning of package size pro-
duces significant cost or real-estate savings.
FEATURES
• 0.5µm drawn two and three-layer metal CMOS
• Optimized 3.3-V core
• Optimized 3-V I/O and 3-V I/O that is 5-V tolerant
• SOG and CSA architecture availability
• 120-ps typical gate propagation delay (for a 2-input
4x-drive NAND gate with a fan-out of 2 and 0mm of
wire, operating at 3.3 V)
• Up to 1.2M raw gates and 624 pads
User-configurable I/O with VSS, VDD, TTL, 3-state,
and 1 mA ~ 24 mA options
• Slew-rate-controlled outputs for low-radiated noise
• Clock tree cells with 0.5-ns clock skew, worst-case
(fan-out 9000 at 75 MHz)
• User-configurable single and dual-port memories
• Specialized macrocells, including phase-locked loop,
GTL, PECL, and PCI cells
• Floorplanning for front-end simulation, back-end
layout controls, and link to synthesis
• JTAG boundary scan and scan-path ATPG
• Support for popular CAE systems, including
Cadence, IKOS, Mentor Graphics, Synopsys,
Viewlogic, and Zycad
Oki Semiconductor
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