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FUJITSU MICROELECTRONICS
DATA SHEET
DS07-13751-2E
16-bit Microcontroller
CMOS
F2MC-16LX MB90820B Series
MB90822B/823B/F822B/F823B/F828B/V820B
DESCRIPTION
The MB90820B series is a line of general-purpose, Fujitsu 16-bit microcontrollers designed for process control
applications which require high-speed real-time processing, such as consumer products.
While inheriting the AT architecture of the F2MC family, the instruction set for the F2MC-16LX CPU core of the
MB90820B series incorporates additional instructions for high-level languages, supports extended addressing
modes, and contains enhanced multiplication and division instructions as well as a substantial collection of
improved bit manipulation instructions. In addition, the MB90820B series has an on-chip 32-bit accumulator which
enables processing of long-word data.
The peripheral resources integrated in the MB90820B series include : an 8/10-bit A/D converter, 8-bit D/A con-
verters, UARTs (SCI) 0, 1, multi-functional timer (16-bit free-run timer, input capture units (ICUs) 0 to 3, output
compare units (OCUs) 0 to 5, 16-bit PPG timer 0, waveform generator), 16-bit PPG timer 1, 2, PWC 0, 1, 16-bit
reload timer 0, 1 and DTP/external interrupt.
Note : F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
FEATURES
• Minimum execution time of instruction : 42 ns / 4 MHz oscillation (uses PLL clock multiplication) maximum
multiplier = 6
• Maximum memory space 16 M bytes, Linear/bank access
• Instruction set optimized for controller applications
Supported data types : bit, byte, word, and long-word types
Standard addressing modes : 23 types
32-bit accumulator enhancing high-precision operations
Signed multiplication/division instructions and enhanced RETI instructions
(Continued)
For the information for microcontroller supports, see the following web site.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2008-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.1
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MB90820B Series
(Continued)
• Enhanced high level language (C) and multi-tasking support instructions
Use of a system stack pointer
Symmetrical instruction set and barrel shift instructions
• Program patch function (for two address pointers)
• Increased execution speed : 4-byte instruction queue
• Powerful interrupt function
Up to eight priority levels programmable
External interrupt inputs : 8 channels
• Automatic data transmission function independent of CPU operation
Up to 16 channels for the extended intelligent I/O service
DTP request inputs : 8 channels
• Internal ROM
Flash memory : 64 K/128 K bytes with flash security
MASK ROM : 64 K/128 K bytes
• Internal RAM
Evaluation product : 16 K bytes
Flash memory : 4 K/8 K bytes
MASK ROM : 4 K bytes
• General-purpose ports
Up to 66 channels (ports where pull-up resistor can be configured : 32 channels)
• A/D Converter (RC) : 16 channels
8/10-bit resolution selectable
Conversion time : Min 3 µs (24 MHz operation, including sampling time)
• 8-bit D/A Converter : 2 channels
• UART : 2 channels
• 16-bit PPG timer : 3 channels
Mode switching function provided (PWM mode or one-shot mode)
ch.0 can be worked with multi-functional timer or independently
• 16-bit reload timer : 2 channels
• 16-bit PWC timer : 2 channels
• Clock supervisor
• Multi-functional timer
Input capture : 4 channels
Output compare with selectable buffer : 6 channels
Free-run timer with up or up-down mode selection and selectable buffer: 1 channel
16-bit PPG timer : 1 channel
Waveform generator : (16-bit timer : 3 channels, 3-phase waveform or dead time)
• Time-base timer/watchdog timer : 18-bit
• Low-power consumption mode :
Sleep mode
Stop mode
CPU intermittent operation mode
• Package :
LQFP-80 (FPT-80P-M21 : 0.50 mm pitch)
LQFP-80 (FPT-80P-M22 : 0.65 mm pitch)
QFP-80 (FPT-80P-M06 : 0.80 mm pitch)
• CMOS technology
2 DS07-13751-2E
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MB90820B Series
PRODUCT LINEUP
Item Part number MB90V820B MB90F822B MB90F823B MB90F828B MB90822B MB90823B
Classification
Evaluation
product
Flash memory product
with flash security
MASK ROM product
ROM size
RAM size
16 K bytes
64 K bytes 128 K bytes 128 K bytes 64 K bytes 128 K bytes
4 K bytes
8 K bytes
4 K bytes
CPU function
Number of instruction : 351
Minimum execution time : 42 ns / 4 MHz (PLL × 6)
Addressing mode : 23
Data bit length : 1, 8, 16 bits
Maximum memory space: 16 M bytes
I/O port
I/O port (CMOS) : 66
Pulse width counter timer : 2 channels
PWC
Timer function (select the counter timer from three internal clocks)
Various pulse width measuring function (“H” pulse width, “L” pulse width, rising edge to fall-
ing edge period, falling edge to rising edge period, rising edge to rising edge period and fall-
ing edge to falling edge period)
UART
UART : 2 channels
With full-duplex double buffer (8-bit length)
Clock asynchronized or clock synchronized transmission (with start and stop bits) can be
selected and used.
Transmission can be one-to-one (bidirectional communication) or one-to-n (master-slave
communication).
16-bit
reload timer
Reload timer : 2 channels
Reload mode, single-shot mode or event count mode selectable
16-bit
PPG timer
PPG timer : 3 channels
PWM mode or single-shot mode selectable
Ch.0 can be worked with multi-functional timer or independently.
Multi-functional
timer
(for AC/DC
motor control)
16-bit free-run timer with up or up-down mode selection and buffer : 1 channel
16-bit output compare : 6 channels
16-bit input capture : 4 channels
16-bit PPG timer : 1 channel
Waveform generator (16-bit timer : 3 channels, 3-phase waveform or dead time)
8/10-bit
A/D converter
8/10-bit resolution (16 channels)
Conversion time : Min 3 µs (24 MHz internal clock, including sampling time)
8-bit
D/A converter
8-bit resolution (2 channels)
DTP/External
interrupt
8 independent channels
Interrupt trigger : Rising edge, falling edge, “L” level or “H” level
Clock supervisor
No
Yes No
Low-power
consumption
Stop mode / Sleep mode / CPU intermittent operation mode
(Continued)
DS07-13751-2E
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MB90820B Series
(Continued)
Item Part number MB90V820B MB90F822B MB90F823B MB90F828B
MB90822B
MB90823B
Package
PGA-299
LQFP-80 (FPT-80P-M21 : 0.50 mm pitch)
LQFP-80 (FPT-80P-M22 : 0.65 mm pitch)
QFP-80 (FPT-80P-M06 : 0.80 mm pitch)
Power supply
voltage for
operation
4.5 V to
5.5 V*1
3.5 V to 5.5 V : Normal operation when A/D converter and
D/A converter are not used
4.0 V to 5.5 V : Normal operation when D/A converter is not
used
4.5 V to 5.5 V : Normal operation when A/D converter and
D/A converter are used
Process
CMOS
Emulator power
supply*2
Included
*1 : MB90V820B is operating guaranteed temperature 0 °C to + 25 °C.
*2 : Configured by a jumper switch (TOOL VCC) when emulator (MB2147-01) is used.
Please refer to the MB2147-01 or MB2147-20 hardware manual (3.3 Emulator-dedicated Power Supply
switching) about details.
PACKAGE AND CORRESPONDING PRODUCTS
Package
MB90V820B MB90F822B MB90F823B MB90F828B MB90822B
PGA-299
XXXX
FPT-80P-M21
X
FPT-80P-M22
X
FPT-80P-M06
X
: Available
X : Not available
Note: For more information about each package, refer to “PACKAGE DIMENSIONS”.
MB90823B
X
4 DS07-13751-2E
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MB90820B Series
DIFFERENCES AMONG PRODUCTS
Memory Size
In evaluation with an evaluation product, note the difference between the evaluation product and the product
actually used. The following items must be taken into consideration.
• The MB90V820B does not have an internal ROM, however, operations equivalent to chips with an internal
ROM can be evaluated by using a dedicated development tool, enabling selection of ROM size by settings of
the development tool.
• In the MB90V820B, images from FF8000H to FFFFFFH are mapped to bank 00, and FE0000H to FF7FFFH are
mapped to bank FE and bank FF only. (This setting can be changed by configuring the development tool.)
• In the MB90822B/F822B/F828B, images from FF8000H to FFFFFFH are mapped to bank 00, and FF0000H to
FF7FFFH are mapped to bank FF only. In the MB90823B/F823B/F828B, images from FF8000H to FFFFFFH
are mapped to bank 00, and FE0000H to FF7FFFH are mapped to bank FE and bank FF only.
Clock Supervisor Function
The clock supervisor is built-in in MB90F828B only. Note that the evaluation products and products actually used
are different when evaluating evaluation products. Please contact the sales representatives for more information
on evaluation of this function.
Modify ROM data
The registers include this function between 001FF0H and 001FF5H which overlap the RAM area of MB90F828B.
Do not access to the RAM when using this function in MB90F282B.
DS07-13751-2E
5
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