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IS61WV25616ALL/ALSwww.DataSheet.co.kr
IS61WV25616BLL/BLS
IS64WV25616BLL/BLS
256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM
JULY 2010
FEATURES
DESCRIPTION
HIGH SPEED: (IS61/64WV25616ALL/BLL)
• High-speed access time: 8, 10, 20 ns
• Low Active Power: 85 mW (typical)
• Low Standby Power: 7 mW (typical)
CMOS standby
LOW POWER: (IS61/64WV25616ALS/BLS)
The ISSI IS61WV25616Axx/Bxx and IS64WV25616Bxx
are high-speed, 4,194,304-bit static RAMs organized as
262,144 words by 16 bits. It is fabricated using ISSI's high-
performance CMOS technology. This highly reliable pro-
cess coupled with innovative circuit design techniques,
yields high-performance and low power consumption de-
vices.
• High-speed access time: 25, 35, 45 ns
• Low Active Power: 35 mW (typical)
• Low Standby Power: 0.6 mW (typical)
CMOS standby
When CE is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
• Single power supply
— VDD 1.65V to 2.2V (IS61WV25616Axx)
— VDD 2.4V to 3.6V (IS61/64WV25616Bxx)
• Fully static operation: no clock or refresh required
• Three state outputs
• Data control for upper and lower bytes
• Industrial and Automotive temperature support
• Lead-free available
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS61WV25616Axx/Bxx and IS64WV25616Bxx are
packaged in the JEDEC standard 44-pin TSOP Type II and
48-pin Mini BGA (6mm x 8mm).
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
CE
OE CONTROL
WE CIRCUIT
UB
LB
256K x 16
MEMORY ARRAY
COLUMN I/O
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such
applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
Rev. G
07/15/2010
1
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IS61WV25616ALL/ALS, IS61WV25616BLL/BLS,
IS64WV25616BLL/BLS
TRUTH TABLE
Mode
Not Selected
Output Disabled
Read
Write
WE CE OE LB UB
XHXXX
H L HXX
X L XHH
HL L LH
HL LHL
HLLLL
L LXLH
L LXHL
LLXLL
I/O PIN
I/O0-I/O7
I/O8-I/O15
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
DOUT
High-Z
DOUT
High-Z
DOUT
DOUT
DIN
High-Z
DIN
High-Z
DIN
DIN
VDD Current
ISB1, ISB2
ICC
ICC
ICC
PIN CONFIGURATIONS
44-Pin TSOP (Type II) and SOJ
A0
A1
A2
A3
A4
CE
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
WE
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44 A17
43 A16
42 A15
41 OE
40 UB
39 LB
38 I/O15
37 I/O14
36 I/O13
35 I/O12
34 GND
33 VDD
32 I/O11
31 I/O10
30 I/O9
29 I/O8
28 NC
27 A14
26 A13
25 A12
24 A11
23 A10
PIN DESCRIPTIONS
A0-A17
I/O0-I/O15
CE
OE
WE
LB
UB
NC
VDD
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
*SOJ package under evaluation.
2 Integrated Silicon Solution, Inc. — www.issi.com
Rev. G
07/15/2010
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IS61WV25616ALL/ALS, IS61WV25616BLL/BLS,
IS64WV25616BLL/BLS
PIN CONFIGURATIONS
44-Pin LQFP
48-Pin mini BGA (6mm x 8mm)
1 23 45 6
CE
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
44 43 42 41 40 39 38 37 36 35 34
1 33
2 32
3 31
4 30
5 29
6 TOP VIEW 28
7 27
8 26
9 25
10 24
11 23
12 13 14 15 16 17 18 19 20 21 22
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
A LB OE A0 A1 A2 N/C
B I/O8 UB A3 A4 CE I/O0
C I/O9 I/O10 A5
A6 I/O1 I/O2
D GND I/O11 A17 A7 I/O3 VDD
E VDD I/O12 NC A16 I/O4 GND
F I/O14 I/O13 A14 A15 I/O5 I/O6
G I/O15 NC A12 A13 WE I/O7
H NC A8 A9 A10 A11 NC
*LQFP package under evaluation.
PIN DESCRIPTIONS
A0-A17
I/O0-I/O15
CE
OE
WE
LB
UB
NC
VDD
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
1
2
3
4
5
6
7
8
9
10
11
12
Integrated Silicon Solution, Inc. — www.issi.com
Rev. G
07/15/2010
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IS61WV25616ALL/ALS, IS61WV25616BLL/BLS,
IS64WV25616BLL/BLS
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
VDD = 3.3V + 5%
Symbol Parameter
Test Conditions
Min.
VOH Output HIGH Voltage
VDD = Min., IOH = –4.0 mA
2.4
VOL Output LOW Voltage
VDD = Min., IOL = 8.0 mA
VIH Input HIGH Voltage
VIL Input LOW Voltage(1)
2
–0.3
ILI Input Leakage
GND VIN VDD
–1
ILO Output Leakage
GND VOUT VDD, Outputs Disabled
–1
Note:
1. VIL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10 ns). Not 100% tested.
Max.
0.4
VDD + 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
VDD = 2.4V-3.6V
Symbol Parameter
Test Conditions
Min.
VOH Output HIGH Voltage
VDD = Min., IOH = –1.0 mA
1.8
VOL Output LOW Voltage
VDD = Min., IOL = 1.0 mA
VIH Input HIGH Voltage
2.0
VIL Input LOW Voltage(1)
–0.3
ILI Input Leakage
GND VIN VDD
–1
ILO Output Leakage
GND VOUT VDD, Outputs Disabled
–1
Note:
1. VIL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10 ns). Not 100% tested.
Max.
0.4
VDD + 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
VDD = 1.65V-2.2V
Symbol Parameter
Test Conditions VDD Min.
VOH
Output HIGH Voltage
IOH = -0.1 mA
1.65-2.2V
1.4
VOL
Output LOW Voltage
IOL = 0.1 mA
1.65-2.2V
VIH Input HIGH Voltage
1.65-2.2V
1.4
VIL(1)
Input LOW Voltage
1.65-2.2V
–0.2
ILI Input Leakage
GND VIN VDD
–1
ILO Output Leakage
GND VOUT VDD, Outputs Disabled
–1
Note:
1. VIL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10 ns). Not 100% tested.
Max.
0.2
VDD + 0.2
0.4
1
1
Unit
V
V
V
V
µA
µA
4 Integrated Silicon Solution, Inc. — www.issi.com
Rev. G
07/15/2010
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IS61WV25616ALL/ALS, IS61WV25616BLL/BLS,
IS64WV25616BLL/BLS
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level (VRef)
OutputLoad
Unit
(2.4V-3.6V)
0V to 3V
1V/ ns
1.5V
See Figures 1 and 2
Unit
(3.3V + 10%)
0V to 3V
1V/ ns
1.5V
See Figures 1 and 2
Unit
(1.65V-2.2V)
0V to 1.8V
1V/ ns
0.9V
See Figures 1 and 2
AC TEST LOADS
OUTPUT
ZO = 50Ω
50Ω
1.5V
30 pF
Including
jig and
scope
Figure 1.
3.3V
319 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 2.
353 Ω
1
2
3
4
5
6
7
8
9
10
11
12
Integrated Silicon Solution, Inc. — www.issi.com
Rev. G
07/15/2010
5
Datasheet pdf - http://www.DataSheet4U.net/