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Preliminary
WM71004 / WM71008 / WM71016
4/8/16Kbit Secure F-RAM Memory with
Gen-2 RFID Access
DESCRIPTION
FEATURES
The WM710xx is a RFID transponder IC with
nonvolatile memory employing an advanced
ferroelectric process. A ferroelectric random access
memory, or F-RAM, is nonvolatile and performs
reads and writes like a RAM. It provides reliable data
retention for 20 years while eliminating the
complexities, overhead, and system level reliability
problems caused by EEPROM and other nonvolatile
memories.
Unlike EEPROM‟s, the WM710xx write operations
are zero power there is no power or speed premium
paid for executing writes into the WM710xx as
compared to read power and speed. Operation of the
memory is fully symmetric: it has an equivalent read
and write range.
The WM710xx‟s RFID interface is compatible with
the EPC Class-1 Generation-2 UHF RFID Protocol
for Communications at 860 MHz 960 MHz,
Version 1.2.0 Specification for RFID Air Interface.
The WM710xx is a two chip configuration offered in
various forms: standard IC package or wafers. All
specifications discussed herein are applicable to the
combined chipset operation.
WM71016
RFID Tag
with F-RAM
RFID
Reader
(Class-1
Gen-2)
Figure 1. System Block Diagram
4/8/16 Kbit Ferroelectric Nonvolatile RAM
Organized as 256/512/1024 x 16 bits
Very High Read/Write Endurance (> 1014)
20-Year Data Retention
Gamma Stability Demonstrated to > 30 kGy
Symmetric Read/Write Operation
Advanced High-Reliability Ferroelectric Process
Interface and Security Features
EPC Class 1 Gen2 (ISO18000-6C) RFID
Compatible Interface (revision 1.2.0)
192-Bit Memory: 96-Bit Electronic Product
Code™ (EPC), 32-Bit Access Password, 32-Bit
KILL Password, 64-Bit TID Memory (Factory
Programmed and Locked)
Inventory, Read, Write and Erase features
Kill Command
Block Permalock Command
Access Command
UHF carrier frequencies from 860 MHz to 960
MHz ISM band, ASK demodulation
Tag-to-reader link frequencies up to 640Kbps
Reader-to-tag asymptotical transmission rates up
to 128Kbps
Supports FM0 and MMS data encoding formats
Custom Features
Stored Address Pointer to Improve Data Write
Speed
Stored Address Pointer Lock
Block Write Command
Variable USER Memory Block Size Support
Ultra Low Power Operation
Memory Read/Write Sensitivity: < -6 dBm (typ.)
Industry Standard Configurations
Industrial Temperature -40C to +85C
Bumped Wafers
8-pin UDFN
This is a product that has fixed target specifications but are
subject to change pending characterization results.
Rev. 1.4
May 2011
Ramtron International Corporation
1850 Ramtron Drive, Colorado Springs, CO 80921
(800) 545-FRAM, (719) 481-7000
http://www.ramtron.com
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WM710xx Secure F-RAM with Gen-2 RFID
PIN CONFIGURATION (UDFN PACKAGE)
Top View
(PCB Layout)
NC 1
8 ANT-
NC 2
7 ANT+
NC 3
6 NC
NC 4
5 NC
3.0 mm × 3.0 mm body, 0.65 mm pad pitch
PIN DESCRIPTION
Pin Name
ANT+, ANT-
NC
Pin Number
7, 8
1, 2, 3, 4, 5, 6
Type
Input
-
Description
RFID Antenna. Connect to external RFID antenna terminals.
There is no internal connection.
Rev. 1.4
May 2011
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FUNCTIONAL DESCRIPTION
WM710xx Secure F-RAM with Gen-2 RFID
The WM710xx is a non-volatile memory device with an industry standard UHF RFID interface that enables
processing data in and out of memory as a generic passive RFID transponder. Unlike other transponder ICs,
the WM710xx transponder IC contains high density symmetric read/write F-RAM memory that enables unique
applications of an RFID solution.
When combined with an appropriate antenna design, WM710xx will power up with energy harvested directly
from the RF field. Following an internally generated reset state, the IC configures itself according to pre-
programmed configuration settings that were stored in F-RAM non-volatile memory at wafer probe, packaged
parts test, or end unit transponder personalization at end-user depot. Configuration settings are read out of
memory and applied prior to enabling data transmission in or out of memory.
As specified in the Gen2 standard, the chip receives and processes commands transmitted by the RFID
interrogator (reader). All required and most optional commands are supported. In addition to these,
WM710xx supports a number of custom commands that take advantage of F-RAM‟s unique ultra low power
and symmetrical characteristics.
Referring to Figure 2, the transponder IC‟s consist of an RFID interface, control and authentication logic, F-
RAM memory, and power management unit. The external antenna is connected directly to the RFID interface
where the RF signal is rectified with high efficiency Schottky diode based rectifier. The rectified voltage is
multiplied up within the Schottky array and then regulated to supply power to on-chip resources.
Also included in the RFID Interface is a modulator/demodulator that detects incoming signals and modulates
the input impedance to enable backscattering of returned signals. The control and authentication logic
processes commands to enable access in and out of F-RAM memory.
RFID
Interface
Power
Management
Control and
Authentication
Logic
F-RAM Array
(16Kb)
External
MCU
(Optional)
Figure 2. Block Diagram
Rev. 1.4
May 2011
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MEMORY MAP
WM710xx Secure F-RAM with Gen-2 RFID
WM710xx‟s memory is partitioned according to the logical and physical mapping shown in Table 1 below.
Table 1: Memory Map
DSPI
Address
0x000
0x001
0x002
0x003
0x004
0x005
0x006
0x007
0x008
0x009
0x00A
0x00B
0x00C
0x00D
0x00E
0x00F
0x010
0x011
0x012
0x013
0x014
0x015
0x016
0x017
0x018
0x019
0x01A
0x01B
Gen-2
Memory Bank
RESERVED
RESERVED
RESERVED
RESERVED
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
EPC
SERVICE
SERVICE
TID
TID
TID
TID
USER
USER
USER
USER
USER
USER
USER
USER
Gen-2
Address
0x000
0x001
0x002
0x003
0x000
0x001
0x002
0x003
0x004
0x005
0x006
0x007
0x008
0x009
0x00A
0x00B
0x000
0x001
0x002
0x003
0x000
0x001
0x002
0x003
0x004
0x005
0x006
0x007
Word
Pointer
(EBV8)
0x00
0x01
0x02
0x03
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x00
0x01
0x02
0x03
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
Description
Kill Password[31:16]
Kill Password[15:0]
Access Password[31:16]
Access Password[15:0]
CRC
PC
EPC - Word 0 (MSW)
EPC - Word 1
EPC - Word 2
EPC - Word 3
EPC - Word 4
EPC - Word 5 (LSW)
EPC - read memory
EPC - read memory
RESERVED
RESERVED
TID - Word 0: xE201
TID - Word 1: x6216
TID - Word 2: Serial #1
TID - Word 3: Serial #2
RESERVED
RFU
Control/Status Register
Working Stored Address Register
USER Memory - Start
0x0FE
0x0FF
0x100
0x101
0x1FE
0x1FF
0x200
0x201
0x3BA
0x3BB
0x3BC
0x3BD
0x3BE
Rev. 1.4
May 2011
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
0x0EA
0x0EB
0x0EC
0x0ED
0x1EA
0x1EB
0x1EC
0x1ED
0x3A6
0x3A7
0x3A8
0x3A9
0x3AA
0x816A
0x816B
0x816C
0x816D
0x836A
0x836B
0x836C
0x836D
0x8726
0x8727
0x8728
0x8729
0x872A
16k Memory: END
(BLK_SIZE = 1 word/block)
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DSPI
Address
0x3DA
0x3DB
0x3DC
0x3DD
0x3DE
0x3EA
0x3EB
0x3EC
0x3ED
0x3EE
0x3F3
0x3F4
0x3F5
0x3F6
0x3F7
0x3F8
0x3F9
0x3FA
0x3FB
0x3FC
0x3FD
0x3FE
0x3FF
Gen-2
Memory Bank
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
USER
Gen-2
Address
0x3C6
0x3C7
0x3C8
0x3C9
0x3CA
0x3D6
0x3D7
0x3D8
0x3D9
0x3DA
0x3DF
0x3E0
0x3E1
0x3E2
0x3E3
0x3E4
0x3E5
0x3E6
0x3E7
0x3E8
0x3E9
0x3EA
0x3EB
WM710xx Secure F-RAM with Gen-2 RFID
Word
Pointer
(EBV8)
0x8746
0x8747
0x8748
0x8749
0x874A
0x8756
0x8757
0x8758
0x8759
0x875A
0x875F
0x8760
0x8761
0x8762
0x8763
0x8764
0x8765
0x8766
0x8767
0x8768
0x8769
0x876A
0x876B
Description
16k Memory: END
(BLK_SIZE = 2 words/block)
16k Memory: END
(BLK_SIZE = 4 words/block)
16k Memory: END
(BLK_SIZE = 8 words/block)
16k Memory: END
(BLK_SIZE = 16 words/block)
16k Memory: END
(BLK_SIZE = 32 words/block)
(BLK_SIZE > 32 words/block)
RESERVED
RESERVED
RESERVED
RESERVED
GEN2 WM710XX MEMORY BANKS
The RFID memory banks reside in Ramtron‟s non-volatile F-RAM memory. F-RAM brings many benefits to
the WM710xx. The first benefit is the size of the memory itself up to 16k-bit, most of which is available in
the USER memory bank. F-RAM‟s impact on the Gen2 protocol is most dramatically seen when writing to
WM710xx memory. Unlike EEPROM memory, no charge pump or memory soak time is required to write to
WM710xx memory, resulting in zero time and zero power penalties. The write cycle is completed
immediately, allowing an interrogator to continue writing additional data to memory with no time penalty
incurred due to the memory itself. A comparison between F-RAM and EEPROM memories is shown in Figure
3. The figure shows the minimum number of Gen2 instructions required to perform a SELECT,
INVENTORY, and ACCESS sequence of commands to write a data word to memory. The same interrogator
command sequence is transmitted to the WM710xx and an EEPROM-based RFID. The effect of the EEPROM
time penalty is shown within the context of the protocol.
Rev. 1.4
May 2011
Page 5 of 24
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