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Ordering number : EN*A1879
LV3327PV
LV3327PGP
Bi-CMOS LSI
Electronic Volume IC
Overview
The LV3327PV/PGP is electronic volume LSI for the volume adjustment of the portable sound equipment usage.
Features
The mixing function is installed, and it is suitable for PND (personal navigation device) as the usage.
It is possible to output it by allocating one system in the audio guidance among four input systems, and mixing other
signals from the speaker output with the audio guidance by the microcomputer control.
Because the volume step resolution is 0.5dB step, the volume can be made to fine-tune.
Two kinds of compact packages are prepared. (SSOP16/VCT16)
The loudness function is installed.
Functions
Input switching : 4 input systems (Independent control is possible.)
Volumn control : +10dB to -79.5dB(0.5dB steps)/-
Loudness control :
Taps are output starting at the -32dB position of the ladder resistor and a loudness function implemented with external
capacitor and resistor components.
Output gain control : 0dB or +6dB select
Mixing function
Output switching :
2 outputs (Each Lch output, Rch output, and Lch/Rch mixing output can be selected).
Each control is done by the sirial data input. I2C
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer's products or
equipment.
N2410 SY No.A1879-1/11
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LV3327PV/PGP
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0V
Parameter
Symbol
Conditions
Maximum supply voltage
Maximum input voltage
Operating temperature
VDD max
VIN max
Topr
VDD
All input pins
Storage temperature
Tstg
Ratings
6
VSS-0.3 to VDD
-40 to +85
-50 to +125
Unit
V
V
°C
°C
Allowable Operating Ratings at Ta = 25°C, VSS = 0V
Parameter
Symbol
Conditions
Supply voltage
High-level input voltage
Low-level input voltage
Input pulse width
Setup time
Hold time
Operating frequency
VDD
VIH
VIL
TφW
Tsetup
Thold
fopg
VDD
DATA, CLK
DATA, CLK
CLK
DATA, CLK
DATA, CLK
CLK
min
3.0
0.7 VDD
VSS
0.6
0.1
Ratings
typ
5.0
max
5.5
VDD
0.2 VDD
0.9
400
Unit
V
V
V
μsec
μsec
μsec
kHz
Electrical Characteristics at Ta = 25°C, VDD = 5V, VSS = 0V
Parameter
Symbol
Conditions
A loss of insertion
Input resistance
Volumn step setting error margin
Total harmonic distortion
Maximum attenuation
Output noise voltage
Current drain
Input high-level current
Input low-level current
Maximum input voltage
ATT
Rin
ATerr
THD
VO min
VN
IDD
IIH
IIL
VCL
IN1/IN2/IN3/IN4
+10dB to -40dB
VIN = 1Vrms, f = 1kHz
VIN = 1Vrms, f = 1kHz
Rin=1kΩ
DATA, CLK, VIN = 5.0V
DATA, CLK, VIN = 0V
THD = 1% RL = 10kΩ
volumn setting : flat, fIN = 1kHz
min
-1.0
-1.0
Ratings
typ
50
0.01
80
5
5
-10
1.0
max
+1.0
+1.0
10
Unit
dB
kΩ
dB
%
dB
μVrms
mA
μA
μA
Vrms
Package Dimensions
unit : mm (typ)
3178B[LV3327PV]
3318[LV3327PGP]
5.2
16
9
TOP VIEW
2.6
SIDE VIEW
BOTTOM VIEW
(0.125)
(C0.116)
1
(0.33)
0.65
8
0.22
0.15
SANYO : SSOP16(225mil)
LASER MARKED
INDEX
SIDE VIEW
0.25
21
0.5
(0.55)
SANYO : VCT16(2.6X2.6)
No.A1879-2/11
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Pin Assignment
LV3327PV/PGP
LCT 1
LSELO 2
IN1 3
IN2 4
IN3 5
IN4 6
RSELO 7
RCT 8
LV3327PV
TOP VIEW
16 LOUT
15 TEST
14 VDD
13 DATA
12 CLK
11 VSS
10 VREF
9 ROUT
12 11 10 9
TEST 13
LOUT 14
LCT 15
LSELO 16
LV3327PGP
1234
8 VREF
7 ROUT
6 RCT
5 RSELO
TOP VIEW
Block Diagram
LCT
LSELO
IN1
IN2
IN3
IN4
RSELO
RCT
INMUTE
Lch MAIN
VOLUME
+10 -79.5dB,-
(0.5dB_step)
LVREF
BIAS
VOLTAGE
CIRCUIT
RVREF
INMUTE
Rch MAIN
VOLUME
+10 -79.5dB,-
(0.5dB_step)
MUTE
Lch
OUTPUT GAIN
0dB,+6dB
LOUT
LOGIC
I2C
INTERFACE
LOGIC
TEST
VDD
DATA
CLK
VSS
VREF
PA
MUTE
Rch
OUTPUT GAIN
0dB,+6dB
ROUT
PA
No.A1879-3/11
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LV3327PV/PGP
Pin Functions
Pin No.
Pin
LV3327PV LV3327PGP
IN1 3
IN2 4
IN3 5
IN4 6
1
2
3
4
Input pins.
Function
LSELO
RSELO
2
7
16 Input selector output pins
5
LCT
RCT
1
8
15 Tap pins for external loudness
6
Equivalent Circuit
VDD
LVREF
RVREF
VDD
+
-
VDD
LOUT
ROUT
16
9
14 Output pins.
7
VDD
+
-
VREF
10
8 Connect a capacitor of a few tens of uF
between VREF and AVSS (VSS) as a 0.5 ×
VDD voltage generator, current ripple
countermeasure.
CLK
12
10 Serial data clock input pin for control.
-
+
LVREF
RVREF
VDD
VDD
DATA
13
11 Serial data input pin for control.
VDD
TEST
VDD
VSS
15
14
11
13 TEST pin
Normally this pin is OPEN.
12 Power supply pin.
9 Ground pin.
No.A1879-4/11
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DATA format : I2C data specification
LV3327PV/PGP
MSB
S
LSB MSB
WA
LSB MSB
A
LSB MSB LSB
A AP
CHIP address
SUB address
(Explanation)
S:Start Condition
P:Stop Condition
W:Write 0(Write Mode Only)
A:Ack(Acknowledge)
DATA_1
DATA_N
DATA setting
CHIP address
MSB
LSB
CP7 CP6 CP5 CP4 CP3 CP2 CP1 CP0
W
CP7 CP6 CP5 CP4 CP3 CP2 CP1 CP0
100
00
01
0
SUB address
MSB
LSB
SU7 SU6 SU5 SU4 SU3 SU2 SU1 SU0
Block
Input switching control (Lch)
Input switching control (Rch)
Volume control (Lch)
Volume control(Rch)
Loudness
TEST control
Output switching control / Output gain control (Lch)
Output switching control / Output gain control (Rch)
DATA
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
DATA_1
DATA_2
DATA_5
DATA_6
DATA_26
DATA_29
DATA_30
DATA_31
SUB address
SU7 SU6 SU5 SU4 SU3 SU2 SU1 SU0
10000000
01000000
10100000
01100000
01011000
10111000
01111000
11111000
Input switching control (DATA_1, DATA_2)
D7 D6 D5 D4 D3 D2 D1 D0
00000000
10000000
01000000
11000000
00100000
DATA_1: Lch side
DATA_2: Rch side
INMUTE
IN1 select
IN2 select
IN3 select
IN4 select
No.A1879-5/11
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