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Freescale Semiconductor
Technical Data
MM908E622
Rev 1.0, 09/2005
Integrated Quad Half-Bridge,
Triple High-Side and EC Glass
Driver with Embedded MCU and
LIN for High End Mirror
The 908E622 is an integrated single-package solution that
includes a high-performance HC08 microcontroller with a
SMARTMOSTM analog control IC. The HC08 includes flash memory,
a timer, enhanced serial communications interface (ESCI), an
analog-to-digital converter (ADC), serial peripheral interface (SPI)
(only internal), and an internal clock generator module. The analog
control die provides four half-bridge and three high-side outputs with
diagnostic functions, an EC glass driver circuit, a Hall-Effect sensor
input, analog inputs, voltage regulator, window watchdog, and local
interconnect network (LIN) physical layer.
The single-package solution, together with LIN, provides optimal
application performance adjustments and space-saving PCB design.
It is well suited for the control of automotive high-end mirrors.
Features
• High-Performance M68HC908EY16 Core
• 16 K Bytes of On-Chip Flash Memory, 512 Bytes of RAM
• Internal Clock Generator Module (ICG)
• Two 16-Bit, 2-Channel Timers
• 10-Bit Analog-to-Digital Converter (ADC)
• LIN Physical Layer Interface
• Autonomous MCU Watchdog / MCU Supervision
• One Analog Input with Switchable Current Source
• Four Low RDS(ON) Half-Bridge Outputs
• Three Low RDS(ON) High-Side Outputs
• EC glass driver circuitry
• Wake-Up Input
• One 2/3-Pin Hall-Effect Sensor Input
12 Microcontroller I/Os
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908E622
908E622
QUAD HALF-BRIDGE, TRIPLE HIGH-SIDE
SWITCH AND EC GLASS CIRCUITRY WITH
EMBEDDED MCU AND LIN
DWB SUFFIX
98ARL10519D
54-TERMINAL SOICW-EP
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MM908E622ACDWB/R2 -40°C to 85°C 54 SOICW-EP
LIN VSUP[1:8] L0
Wake Up Input
VDDA/VREFH
EVDD
VDD
HB1
HB2
µC PortA
µC PortB
µC PortC
µC PortD
µC PortE
VSSA/VREFL
EVSS
VSS
RST_A
RST
IRQ_A
IRQ
PTA0/KBD0
PTA1/KBD1
PTA2/KBD2
PTA3/KBD3
PTA4/KBD4
PTB3/AD3
PTB4/AD4
PTB5/AD5
PTC2/MCLK
PTC3/OSC2
PTC4/OSC1
Internally connected PTD0/TACH0
PTD1/TACH1
Internally connected PTE1/RxD
GND[1:4] EP
HB3
HB4
HS1
HS2
HS3
ECR
EC
HVDD
A0
A0CST
H0
TESTMODE
MM
4 x Half Bridge Outputs
M
High Side Output 1
High Side Output 2
High Side Output 3
EC - Glas Control
Switched 5V output
Analog Input with current source
Analog Input current source trim
2-/3-pin hall sensor input
Pull to ground for user mode
Figure 1. 908E622 Simplified Application Diagram
This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2005. All rights reserved.
datasheet pdf - http://www.DataSheet4U.net/

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Internal Block Diagram
INTERNAL BLOCK DIAGRAM
GND[1:4]
VSUP[1:8]
TESTMODE
LIN
RST_A
IRQ_A
PTE1/RXD
PTD0/TACH0
IRQ
RST
VSSA/VREFL
EVSS
EVDD
VDDA/VREFH
908E622
2
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Internal Bus
PORT C PORT D PORT E
DDRC DDRD DDRE
DDRA
PORT A
DDRB
PORT B
Analog Integrated Circuit Device Data
Freescale Semiconductor
datasheet pdf - http://www.DataSheet4U.net/

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Terminal Connections
TERMINAL CONNECTIONS
Transparent Top
View of Package
PTC4 /OSC1
PTC3 /OSC2
PTC2 / MCLK
PTB5 /AD5
PTB4 /AD4
PTB3 /AD3
IRQ
RST
(PTD0/TACH0/BEMF -> PWM)
PTD1/TACH1
RST_A
IRQ_A
LIN
A0CST
A0
GND1
HB4
VSUP1
GND2
HB3
VSUP2
EC
ECR
TESTMODE
GND3
HB2
VSUP3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Exposed
Pad
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
Figure 3. Terminal Connectionshttp://www.DataSheet4U.net/
PTA0 / KBD0
PTA1 / KBD1
PTA2 / KBD2
FLSVPP
PTA3 / KBD3
PTA4 / KBD4
VDDA/VREFH
EVDD
EVSS
VSSA/VREFL
(PTE1/RXD <- RXD)
VSS
VDD
HVDD
L0
H0
HS3
VSUP8
HS2
VSUP7
HS1b
HS1a
VSUP6
VSUP5
GND4
HB1
VSUP4
Table 1. Terminal Definitions
A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 21.
Die Terminal Terminal Name
Formal Name
Definition
MCU
MCU
MCU
MCU
1
2
3
4
5
6
7
8
PTC4/OSC1
PTC3/OSC2
PTC2/MCLK
PTB5/AD5
PTB4/AD4
PTB3/AD3
IRQ
RST
Port C I/Os
These terminals are special-function, bidirectional I/O port terminals
that are shared with other functional modules in the MCU.
Port B I/Os
These terminals are special-function, bidirectional I/O port terminals
that are shared with other functional modules in the MCU.
External Interrupt
Input
External Reset
This terminal is an asynchronous external interrupt input terminal.
This terminal is bidirectional, allowing a reset of the entire system. It is
driven low when any internal reset source is asserted.
MCU /
Analog
MCU
9 (PTD0/TACH0/BEMF PWM signal
-> PWM)
10 PTD1/TACH1
Port D I/Os
This terminal is the PWM signal test terminal. It internally connects the
MCU PTD0/TACH0 terminal with the Analog die PWM input.
Note: Do not connect in the application.
This terminal is a special-function, bidirectional I/O port terminal that is
shared with other functional modules in the MCU.
MCU /
Analog
44 (PTE1/RXD <- RXD) LIN Transceiver This terminal is the LIN Transceiver output test terminal. It internally
Output
connects the MCU PTE1/RXD terminal with the Analog die LIN
transceiver output terminal RXD.
Note: Do not connect in the application.
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E622
3
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Terminal Connections
Table 1. Terminal Definitions (continued)
A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 21.
Die
MCU
MCU
Terminal
45
48
46
47
Terminal Name
VSSA/VREFL
VDDA/VREFH
EVSS
EVDD
Formal Name
Definition
ADC Supply and These terminals are the power supply and voltage reference terminals
Reference Terminals for the analog-to-digital converter (ADC).
MCU Power Supply These terminals are the ground and power supply terminals,
Terminals
respectively. The MCU operates from a single power supply.
MCU
MCU
Analog
49
50
52
53
54
51
11
PTA4/KBD4
PTA3/KBD3
PTA2/KBD2
PTA1/KBD1
PTA0/KBD0
FLSVPP
RST_A
Port A I/Os
These terminals are special-function, bidirectional I/O port terminals
that are shared with other functional modules in the MCU.
Test Terminal
Internal Reset
For test purposes only. Do not connect in the application.
This terminal is the bidirectional reset terminal of the analog die.
Analog
12
IRQ_A
Internal Interrupt
Output
This terminal is the interrupt output terminal of the analog die indicating
errors or wake-up events.
Analog
Analog
13
14
LIN
A0CST
LIN Bus
Analog Input Trim
Terminal
This terminal represents the single-wire bus transmitter and receiver.
This is the Analog Input Trim Terminal for the A0 input. This is to
connect a known fixed resistor value to trim the current source
measurement.
Analog
Analog
Analog
Analog
Analog
Analog
15
16
19
25
30
29
26
20
17
18
21
27
28
31
32
35
22
23
24
A0
GND1
GND2
GND3
GND4
HB1
HB2
HB3
HB4
VSUP1
VSUP2
VSUP3
VSUP4
VSUP5
VSUP6
VSUP7
EC
ECR
TESTMODE
Analog Input Terminal This terminal is an analog input port with selectable source values.
Power Ground
Terminals
These terminals are device power ground connections.
Half-Bridge Outputs
Power Supply
Terminals
This device includes power MOSFETs configured as four half-bridge
driverhttp://www.DataSheet4U.net/ outputs. These outputs may be configured for DC motor drivers,
or as high-side and low-side switches.
Note: The HB3 and HB4 have a lower RDS(ON) then HB1 and HB2.
These terminals are device power supply terminals.
EC Glass Terminal
EC Ballast Resistor
Terminal
TESTMODE Input
These are the Electrochrome Circuitry Terminals. The EC Terminal has
to be connected to the EC Glass and the ECR Terminal has to be
connected to the external ballast resistor.
Terminal for test purpose only. In application this terminal needs to be
tied GND.
Analog
Analog
Analog
34
35
36
38
39
Analog
40
HS1a
HS1b
HS2
HS3
H0
L0
High-Side HS1
Output
High-Side HS2
Output
High-Side HS3
Output
Hall-Effect Sensor /
General Purpose
Input
Wake-up Input
This output terminal is a low RDS(ON) high-side switch.
These output terminals are low RDS(ON) high-side switches.
This terminal provides an input for a Hall-effect sensor or general
purpose input.
This terminal provides an high voltage input, which is wake-up capable.
908E622
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
datasheet pdf - http://www.DataSheet4U.net/

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Terminal Connections
Table 1. Terminal Definitions (continued)
A functional description of each terminal can be found in the Functional Terminal Description section beginning on page 21.
Die Terminal Terminal Name
Formal Name
Definition
Analog
41
HVDD
Switchable VDD
Output
This terminal is a switchable VDD output for driving resistive loads
requiring a regulated 5.0 V supply; e.g. potentiometers.
Analog
42
VDD
Voltage Regulator The +5.0 V voltage regulator output terminal is intended to supply the
Output
embedded microcontroller.
Analog
43
VSS
Voltage Regulator Ground terminal for the connection of all non-power ground connections
Ground
(microcontroller and sensors).
EP
Exposed Pad
Exposed Pad
The exposed pad terminal on the bottom side of the package conducts
heat from the chip to the PCB board.
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Analog Integrated Circuit Device Data
Freescale Semiconductor
908E622
5
datasheet pdf - http://www.DataSheet4U.net/