(a) T-55264GD057J-FW-ABN LCD Module Technical Specification REV 1 dated 4/25/2008
(b) T-55265GD057J-LW-ABN LCD Module Technical Specification REV 1 dated 4/15/2008
2.1. This application note provides guidance for interfacing, programming, and using the T-55264 and
T-55265-series displays. This document, along with the LCD module specification, references (a)
and (b), provides the application information needed design the display into electronic products.
This document IS NOT INTENDED to be the sole source of guidance for using the display.
2.2. The LCD module drawing provides size and information for the connector(s) built in the product.
The drawing does not provide the source for flexible printed circuits (FPC) that mate to the zero-
insertion force (ZIF) connectors since there are many potential sources available. The drawings
are provided within references (a) and (b).
2.3. The LCD Module Technical Specification provides electrical and optical performance
specifications, cosmetic specifications, and qualification information.
2.4. The T-55264- & T-55265-series displays include the following components:
• 262K Color thin film transistor (TFT) liquid crystal display panel.
• Either a white cold cathode fluorescent lamp (CCFL) backlight [T-55264] or white light emitting
diode (LED) backlight [T-55265].
• TFT timing controller, source drivers and gate driver.
• DC-to-DC Boost Circuits to generate gate and source driver voltages. The displays require a
single 3.3 VDC source.
2.5. The displays require additional components to integrate into the end unit:
• CCFL backlight inverter (T-55264) or LED power supply / LED driver (T-55265).
• Interconnect flat flex cable or flexible printed circuit.
• Mounting screws
• LCD controller.
3.0 PRINCIPLES OF OPERATION
3.1. A microprocessor writes to an LCD controller to configure it for operation. The configuration data
tells the device the polarity and sequencing of control signals and their timing. The
microprocessor then writes or ports image data to the LCD controller for storage in RAM. The
controller reads the RAM and automatically generates the control signals to write data to the
display. There are 18 data bits in RAM for each pixel location (6 red, 6 green, and 6 blue). 18
data bits are latched into the display with each pixel clock.
The controller generates control signals to tell the display when to begin writing a new line (HSYC)
and when to start writing a new page (VSYC). The DENA signal controls the horizontal position of
the data on the page.
The source driver in the display takes the data and performs a digital to analog voltage conversion
on the groups of six bits. The corresponding drive voltage controls the twist of the liquid crystal
and thus the light passage through it.
With 6 bits of data, 64 gray shades are generated for each red, green, and blue sub-pixel, within a
pixel. There are 262 K combinations or red, green, and blue shades possible.
OPTREX AMERICA OAI-80018AA-7603-A
T-55264GD057J-FW- & T-55265GD057J-LW-Series
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datasheet pdf - http://www.DataSheet4U.net/