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FEATURES
Unique 1-wire interface requires only one
port pin for communication
Derives power from data line (“parasite
power”)—does not need a local power supply
Multi-drop capability simplifies distributed
temperature sensing applications
Requires no external components
• ±0.5°C accuracy from –10°C to +85°C
Measures temperatures from –55°C to
+100°C (–67°F to +212°F)
9-bit thermometer resolution
Converts temperature in 750 ms (max.)
User–definable non-volatile temperature
alarm settings
Alarm search command identifies and
addresses devices whose temperature is
outside of programmed limits (temperature
alarm condition)
Ideal for use in remote sensing applications
(e.g., temperature probes) that do not have a
local power source
DS18S20-PAR
1-Wire® Parasite-Power
Digital Thermometer
PIN ASSIGNMENT
DALLAS
18S20P
123
123
(BOTTOM VIEW)
TO-92
(DS18S20-PAR)
PIN DESCRIPTION
GND - Ground
DQ - Data In/Out
NC - No Connect
DESCRIPTION
The DS18S20-PAR digital thermometer provides 9–bit centigrade temperature measurements and has an
alarm function with nonvolatile user-programmable upper and lower trigger points. The DS18S20-PAR
does not need an external power supply because it derives power directly from the data line (“parasite
power”). The DS18S20-PAR communicates over a 1-wire bus, which by definition requires only one
data line (and ground) for communication with a central microprocessor. It has an operating temperature
range of –55°C to +100°C and is accurate to ±0.5°C over a range of –10°C to +85°C.
Each DS18S20-PAR has a unique 64-bit identification code, which allows multiple DS18S20-PARs to
function on the same 1–wire bus; thus, it is simple to use one microprocessor to control many
DS18S20-PARs distributed over a large area. Applications that can benefit from this feature include
HVAC environmental controls, temperature monitoring systems inside buildings, equipment or
machinery, and process monitoring and control systems.
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043001
Free Datasheet http://www.datasheet4u.com/

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DS18S20-PAR
DETAILED PIN DESCRIPTIONS Table 1
PIN SYMBOL
DESCRIPTION
1 GND Ground.
2 DQ Data Input/Output pin. Open-drain 1-wire interface pin. Also provides power
to the device when used in parasite power mode (see “Parasite Power” section.)
3 NC No Connect. Doesn’t connect to internal circuit.
OVERVIEW
The DS18S20-PAR uses Dallas’ exclusive 1-wire bus protocol that implements bus communication using
one control signal. The control line requires a weak pullup resistor since all devices are linked to the bus
via a 3-state or open-drain port (the DQ pin in the case of the DS18S20-PAR). In this bus system, the
microprocessor (the master device) identifies and addresses devices on the bus using each device’s
unique 64-bit code. Because each device has a unique code, the number of devices that can be addressed
on one bus is virtually unlimited. The 1-wire bus protocol, including detailed explanations of the
commands and “time slots,” is covered in the 1-WIRE BUS SYSTEM section of this datasheet.
An important feature of the DS18S20-PAR is its ability to operate without an external power supply.
Power is instead supplied through the 1-wire pullup resistor via the DQ pin when the bus is high. The
high bus signal also charges an internal capacitor (CPP), which then supplies power to the device when the
bus is low. This method of deriving power from the 1-wire bus is referred to as “parasite power.”
Figure 1 shows a block diagram of the DS18S20-PAR, and pin descriptions are given in Table 1. The
64-bit ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte
temperature register that stores the digital output from the temperature sensor. In addition, the scratchpad
provides access to the 1-byte upper and lower alarm trigger registers (TH and TL). The TH and TL
registers are nonvolatile (EEPROM), so they will retain their data when the device is powered down.
DS18S20-PAR BLOCK DIAGRAM Figure 1
VPU
4.7K
DQ
PARASITE POWER
CIRCUIT
INTERNAL VDD
CPP
64-BIT ROM
AND
1-wire PORT
GND
MEMORY CONTROL DS18S20-PAR
LOGIC
SCRATCHPAD
TEMPERATURE SENSOR
ALARM HIGH TRIGGER (TH)
REGISTER (EEPROM)
ALARM LOW TRIGGER (TL)
REGISTER (EEPROM)
8-BIT CRC GENERATOR
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DS18S20-PAR
PARASITE POWER
The DS18S20-PAR’s parasite power circuit allows the DS18S20-PAR to operate without a local external
power supply. This ability is especially useful for applications that require remote temperature sensing or
that are very space constrained. Figure 1 shows the DS18S20-PAR’s parasite-power control circuitry,
which “steals” power from the 1-wire bus via the DQ pin when the bus is high. The stolen charge powers
the DS18S20-PAR while the bus is high, and some of the charge is stored on the parasite power capacitor
(CPP) to provide power when the bus is low.
The 1-wire bus and CPP can provide sufficient parasite power to the DS18S20-PAR for most operations as
long as the specified timing and voltage requirements are met (refer to the DC ELECTRICAL
CHARACTERISTICS and the AC ELECTRICAL CHARACTERISTICS sections of this data sheet).
However, when the DS18S20-PAR is performing temperature conversions or copying data from the
scratchpad memory to EEPROM, the operating current can be as high as 1.5 mA. This current can cause
an unacceptable voltage drop across the weak 1-wire pullup resistor and is more current than can be
supplied by CPP. To assure that the DS18S20-PAR has sufficient supply current, it is necessary to
provide a strong pullup on the 1-wire bus whenever temperature conversions are taking place or data is
being copied from the scratchpad to EEPROM. This can be accomplished by using a MOSFET to pull
the bus directly to the rail as shown in Figure 2. The 1-wire bus must be switched to the strong pullup
within 10 µs (max) after a Convert T [44h] or Copy Scratchpad [48h] command is issued, and the bus
must be held high by the pullup for the duration of the conversion (tconv) or data transfer (twr = 10 ms).
No other activity can take place on the 1-wire bus while the pullup is enabled.
SUPPLYING THE DS18S20-PAR DURING TEMPERATURE CONVERSIONS
Figure 2
VPU
Micro-
processor
VPU
4.7K
DS18S20-PAR
GND DQ
1-Wire Bus
To Other
1-Wire Devices
OPERATION – MEASURING TEMPERATURE
The core functionality of the DS18S20-PAR is its direct-to-digital temperature sensor. The temperature
sensor output has 9-bit resolution, which corresponds to 0.5°C steps. The DS18S20-PAR powers-up in a
low-power idle state; to initiate a temperature measurement and A-to-D conversion, the master must issue
a Convert T [44h] command. Following the conversion, the resulting thermal data is stored in the 2-byte
temperature register in the scratchpad memory and the DS18S20-PAR returns to its idle state. The
DS18S20-PAR output data is calibrated in degrees centigrade; for Fahrenheit applications, a lookup table
or conversion routine must be used. The temperature data is stored as a 16-bit sign-extended two’s
complement number in the temperature register (see Figure 3). The sign bits (S) indicate if the
temperature is positive or negative: for positive numbers S = 0 and for negative numbers S = 1. Table 2
gives examples of digital output data and the corresponding temperature reading.
Resolutions greater than 9 bits can be calculated using the data from the temperature, COUNT REMAIN
and COUNT PER °C registers in the scratchpad. Note that the COUNT PER °C register is hard-wired to
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DS18S20-PAR
16 (10h). After reading the scratchpad, the TEMP_READ value is obtained by truncating the 0.5°C bit
(bit 0) from the temperature data (see Figure 3). The extended resolution temperature can then be
calculated using the following equation:
TEMPERATURE = TEMP _ READ 0.25 + COUNT _ PER _ C COUNT _ REMAIN
COUNT _ PER _ C
Additional information about high-resolution temperature calculations can be found in Application Note
105: “High Resolution Temperature Measurement with Dallas Direct-to-Digital Temperature Sensors”.
TEMPERATURE REGISTER FORMAT Figure 3
bit 7 bit 6 bit 5 bit 4 bit 3
LS Byte
26
25
24
23
22
MS Byte
bit 15
S
bit 14
S
bit 13
S
bit 12
S
bit 11
S
bit 2
21
bit 10
S
bit 1
20
bit 9
S
bit 0
2-1
bit 8
S
TEMPERATURE/DATA RELATIONSHIP Table 2
TEMPERATURE DIGITAL OUTPUT DIGITAL OUTPUT
(Binary)
(Hex)
+85.0°C*
0000 0000 1010 1010
00AAh
+25.0°C
0000 0000 0011 0010
0032h
+0.5°C
0000 0000 0000 0001
0001h
0°C 0000 0000 0000 0000
0000h
-0.5°C
1111 1111 1111 1111
FFFFh
-25.0°C
1111 1111 1100 1110
FFCEh
-55.0°C
1111 1111 1001 0010
FF92h
*The power-on reset value of the temperature register is +85°C
OPERATION – ALARM SIGNALING
After the DS18S20-PAR performs a temperature conversion, the temperature value is compared to the
user-defined two’s complement alarm trigger values stored in the 1-byte TH and TL registers (see Figure
4). The sign bit (S) indicates if the value is positive or negative: for positive numbers S = 0 and for
negative numbers S = 1. The TH and TL registers are nonvolatile (EEPROM) so they will retain data
when the device is powered down. TH and TL can be accessed through bytes 2 and 3 of the scratchpad as
explained in the MEMORY section of this datasheet.
TH AND TL REGISTER FORMAT Figure 4
bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
S 26 25 25 25 22 21 20
Only bits 8 through 1 of the temperature register are used in the TH and TL comparison since TH and TL
are 8-bit registers. If the result of a temperature measurement is higher than TH or lower than TL, an
alarm condition exists and an alarm flag is set inside the DS18S20-PAR. This flag is updated after every
temperature measurement; therefore, if the alarm condition goes away, the flag will be turned off after the
next temperature conversion.
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DS18S20-PAR
The master device can check the alarm flag status of all DS DS18S20-PARs on the bus by issuing an
Alarm Search [ECh] command. Any DS18S20-PARs with a set alarm flag will respond to the command,
so the master can determine exactly which DS18S20-PARs have experienced an alarm condition. If an
alarm condition exists and the TH or TL settings have changed, another temperature conversion should be
done to validate the alarm condition.
64-BIT LASERED ROM CODE
Each DS18S20-PAR contains a unique 64–bit code (see Figure 5) stored in ROM. The least significant 8
bits of the ROM code contain the DS18S20-PAR’s 1–wire family code: 10h. The next 48 bits contain a
unique serial number. The most significant 8 bits contain a cyclic redundancy check (CRC) byte that is
calculated from the first 56 bits of the ROM code. A detailed explanation of the CRC bits is provided in
the CRC GENERATION section. The 64–bit ROM code and associated ROM function control logic
allow the DS18S20-PAR to operate as a 1–wire device using the protocol detailed in the 1-WIRE BUS
SYSTEM section of this datasheet.
64-BIT LASERED ROM CODE Figure 5
8-BIT CRC
48-BIT SERIAL NUMBER
8-BIT FAMILY CODE (10h)
MSB
LSB MSB
LSB MSB
LSB
MEMORY
The DS18S20-PAR’s memory is organized as shown in Figure 6. The memory consists of an SRAM
scratchpad with nonvolatile EEPROM storage for the high and low alarm trigger registers (TH and TL).
Note that if the DS18S20-PAR alarm function is not used, the TH and TL registers can serve as general-
purpose memory. All memory commands are described in detail in the DS18S20-PAR FUNCTION
COMMANDS section.
Byte 0 and byte 1 of the scratchpad contain the LSB and the MSB of the temperature register,
respectively. These bytes are read-only. Bytes 2 and 3 provide access to TH and TL registers. Bytes 4
and 5 are reserved for internal use by the device and cannot be overwritten; these bytes will return all 1s
when read. Bytes 6 and 7 contain the COUNT REMAIN and COUNT PER ºC registers, which can be
used to calculate extended resolution results as explained in the OPERATION – MEASURING
TEMPERATURE section. Byte 8 of the scratchpad is read-only and contains the cyclic redundancy
check (CRC) code for bytes 0 through 7 of the scratchpad. The DS18S20-PAR generates this CRC using
the method described in the CRC GENERATION section.
Data is written to bytes 2 and 3 of the scratchpad using the Write Scratchpad [4Eh] command; the data
must be transmitted to the DS18S20-PAR starting with the least significant bit of byte 2. To verify data
integrity, the scratchpad can be read (using the Read Scratchpad [BEh] command) after the data is
written. When reading the scratchpad, data is transferred over the 1-wire bus starting with the least
significant bit of byte 0. To transfer the TH and TL data from the scratchpad to EEPROM, the master
must issue the Copy Scratchpad [48h] command.
Data in the EEPROM registers is retained when the device is powered down; at power-up the EEPROM
data is reloaded into the corresponding scratchpad locations. Data can also be reloaded from EEPROM
to the scratchpad at any time using the Recall E2 [B8h] command. The master can issue “read time slots”
(see the 1-WIRE BUS SYSTEM section) following the Recall E2 command and the DS18S20-PAR will
indicate the status of the recall by transmitting 0 while the recall is in progress and 1 when the recall is
done.
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