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STW12NK90Z
N-channel 900V - 0.72- 11A - TO-247
Zener-protected SuperMESH™ Power MOSFET
General features
Type
STW12NK90Z
VDSS
900V
RDS(on)
<0.88
ID pW
11A 230W
Extremely high dv/dt capability
100% avalanche tested
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeatibility
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage MOSFETs including revolutionary
MDmesh™ products.
Applications
Switching application
TO-247
Internal schematic diagram
Order codes
Part number
STW12NK90Z
Marking
W12NK90Z
Package
TO-247
Packaging
Tube
October 2006
Rev 5
1/14
www.st.com
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Contents
Contents
STW12NK90Z
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Protection features of gate-to-source zener diodes . . . . . . . . . . . . . . . . . . 4
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
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STW12NK90Z
1 Electrical ratings
Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Parameter
VDS
VGS
ID
ID
IDM(1)
Ptot
Drain-source voltage (VGS = 0)
Gate- source voltage
Drain current (continuous) at TC = 25°C
Drain current (continuous) at TC = 100°C
Drain current (pulsed)
Total dissipation at TC = 25°C
Derating Factor
VESD(G-S)
EAS (2)
Tstg
Tj
Gate source ESD(HBM-C=100pF, R=1.5KΩ)
Single pulse avalanche energy
Storage temperature
Max. operating junction temperature
1. Pulse width limited by safe operating area.
2. ISD 11A, di/dt 200A/µs, VDD V(BR)DSS, Tj TJMAX.
Value
900
± 30
11
7
44
230
1.85
6000
4.5
-55 to 150
Unit
V
V
A
A
A
W
W/°C
V
mJ
°C
Table 2. Thermal data
Rthj-case Thermal resistance junction-case max
Rthj-amb Thermal resistance junction-ambient max
TJ Maximum lead temperature for soldering purpose
0.54 °C/W
50 °C/W
300 °C
Table 3. Avalanche characteristics
Symbol
Parameter
Avalanche current, repetitive or not-repetitive
IAR (pulse width limited by Tj max)
Single pulse avalanche energy
EAS (starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Max value
11
500
Unit
A
mJ
Table 4. Gate-source zener diode
Symbol
Parameter
Test conditions
BVGSO
Gate-source breakdown
voltage
Igs=± 1mA (open drain)
Min. Typ. Max. Unit
30 V
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Electrical ratings
STW12NK90Z
1.1 Protection features of gate-to-source zener diodes
The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
4/14
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STW12NK90Z
2 Electrical characteristics
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
Drain-source
V(BR)DSS breakdown voltage
IDSS
Zero gate voltage
drain current (VGS = 0)
IGSS
VGS(th)
RDS(on)
Gate-body leakage
current (VDS = 0)
Gate threshold voltage
Static drain-source on
resistance
Test conditions
Min.
ID = 1mA, VGS =0
VDS = max rating
VDS = max rating,
TC = 125°C
VGS = ± 20V
VDS = VGS, ID = 100µA
VGS = 10V, ID = 5.5A
900
3
Typ. Max. Unit
V
1 µA
50 µA
±10
3.75 4.5
0.72 0.88
µA
V
Table 6.
Symbol
Dynamic
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1)
Forward
transconductance
VDS = 15V, ID = 5.5A
11 S
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 25V, f = 1MHz,
VGS = 0
3500
280
58
pF
pF
pF
Coss
(2)
eq
Equivalent output
capacitance
VGS = 0V, VDS = 0V
to 800V
117 pF
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 450V, ID = 5A
RG = 4.7VGS = 10V
(see Figure 13)
VDD = 720V, ID = 10A,
VGS = 10V, RG = 4.7
(see Figure 14)
31 ns
20 ns
88 ns
55 ns
113 152 nC
19 nC
60 nC
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
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