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STW11NK90Z
N-channel 900V - 0.82- 9.2A - TO-247
Zener-protected SuperMESH™ Power MOSFET
General features
Type
STW11NK90Z
VDSS
900V
RDS(on)
<0.98
ID Pw
9.2A 200W
100% avalanche tested
Extremely high dv/dt capability
Gate charge minimized
Very low intrinsic capacitances
Very good manufacturing repeability
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage Power MOSFETs including revolutionary
MDmesh™ products
Applications
Switching application
TO-247
Internal schematic diagram
Order codes
Part number
STW11NK90Z
Marking
W11NK90Z
Package
TO-247
Packaging
Tube
July 2006
Rev 2
1/12
www.st.com
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Contents
Contents
STW11NK90Z
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STW11NK90Z
1 Electrical ratings
Table 1. Absolute maximum ratings
Symbol
Parameter
VDS
VDGR
VGS
ID
ID
IDM(1)
PTOT
Drain-source voltage (VGS = 0)
Drain-gate voltage (RGS = 20K)
Gate-source voltage
Drain current (continuous) at TC = 25°C
Drain current (continuous) at TC=100°C
Drain current (pulsed)
Total dissipation at TC = 25°C
Derating factor
VESD(G-D) Gate source ESD(HBM-C=100pF, R=1.5KΩ)
dv/dt(2) Peak diode recovery voltage slope
TJ Operating junction temperature
Tstg Storage temperature
1. Pulse width limited by safe operating area
2. ISD < 9.2A, di/dt < 200A/µs, VDD =80%V(BR)DSS
Table 2. Thermal resistance
Symbol
Parameter
Rthj-case
Rthj-a
Tl
Thermal resistance junction-case Max
Thermal resistance junction-ambient Max
Maximum lead temperature for soldering purpose
Table 3. Avalanche data
Symbol
Parameter
Avalanche current, repetitive or not-repetitive
IAR (pulse width limited by Tj Max)
Single pulse avalanche energy
EAS (starting Tj=25°C, Id=Iar, Vdd=50V)
Electrical ratings
Value
900
900
± 30
9.2
5.8
36.8
200
1.51
6000
4.5
-55 to 150
Unit
V
V
V
A
A
A
W
W/°C
V
V/ns
°C
Value
0.66
50
300
Unit
°C/W
°C/W
°C
Value
9.2
400
Unit
A
mJ
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Electrical characteristics
2 Electrical characteristics
STW11NK90Z
(TCASE=25°C unless otherwise specified)
Table 4. On/off states
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
V(BR)DSS
Drain-source breakdown
voltage
IDSS
Zero gate voltage drain
current (VGS = 0)
IGSS
VGS(th)
RDS(on)
Gate body leakage current
(VDS = 0)
Gate threshold voltage
Static drain-source on
resistance
ID = 1mA, VGS= 0
VDS = Max rating,
VDS = Max rating @125°C
VGS = ±20V
VDS= VGS, ID = 100µA
VGS= 10V, ID= 4.6A
900
3
3.75
0.82
1
50
±10
4.5
0.98
V
µA
µA
µA
V
Table 5. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1) Forward transconductance VDS =15V, ID = 4.6A
11 S
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =25V, f=1 MHz, VGS=0
3000
240
48
pF
pF
pF
Coss
(2)
eq .
Equivalent output
capacitance
VGS=0, VDS =0V to 720V
83
pF
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
VDD=720V, ID = 9.2A
VGS =10V
(see Figure 14)
95 115 nC
14 nC
49 nC
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
inceases from 0 to 80% VDSS
Table 6. Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD=450 V, ID= 4.6A,
RG=4.7Ω, VGS=10V
(see Figure 13)
Min. Typ. Max. Unit
30 ns
19 ns
76 ns
50 ns
4/12
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STW11NK90Z
Electrical characteristics
Table 7. Source drain diode
Symbol
Parameter
Test conditions
ISD
ISDM(1)
VSD(2)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=9.2A, VGS=0
ISD=9.2A,
di/dt = 100A/µs,
VDD=50V, Tj=25°C
(see Figure 18)
ISD=9.2A,
di/dt = 100A/µs,
VDD=50V, Tj=150°C
(see Figure 18)
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
Min. Typ. Max. Unit
9.2 A
36.8 A
1.6 V
584 ns
6 µC
21 A
790 ns
8.7 µC
22 A
Table 8. Gate-source zener diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
BVGSO(1)
Gate-source breakdown
voltage
Igs=±1mA (open drain) 30
V
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
5/12
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