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STY60NK30Z
N-CHANNEL 300V - 0.033- 60A Max247
Zener-Protected SuperMESH™Power MOSFET
TYPE
VDSS
RDS(on)
ID
Pw
STY60NK30Z 300 V < 0.045 60 A 450 W
s TYPICAL RDS(on) = 0.033
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s GATE CHARGE MINIMIZED
s VERY LOW INTRINSIC CAPACITANCES
s VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established strip-
based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmesh™ products.
3
2
1
Max247
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH EFFICIENCY
SWITCHING DC/DC CONVETERS FOR
PLASMA TV’s
s IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
ORDERING INFORMATION
SALES TYPE
MARKING
STY60NK30Z
Y60NK30Z
PACKAGE
Max247
PACKAGING
TUBE
February 2004
1/8
Free Datasheet http://www.Datasheet4U.com

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STY60NK30Z
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 k)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM ( ) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
VESD(G-S) Gate source ESD(HBM-C=100 pF, R=1.5 KΩ)
dv/dt (1) Peak Diode Recovery voltage slope
Tj Operating Junction Temperature
Tstg Storage Temperature
( ) Pulse width limited by safe operating area
(1) ISD 60A, di/dt 200A/µs, VDD V(BR)DSS, Tj TJMAX.
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max
Rthj-amb Thermal Resistance Junction-ambient Max
Tl Maximum Lead Temperature For Soldering Purpose
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
GATE-SOURCE ZENER DIODE
Symbol
Parameter
BVGSO
Gate-Source Breakdown
Voltage
Test Conditions
Igs=± 1mA (Open Drain)
Value
300
300
± 30
60
37.5
240
450
3.57
6000
4.5
-55 to 150
Unit
V
V
V
A
A
A
W
W/°C
V
V/ns
°C
0.28
30
300
Max Value
60
0.7
°C/W
°C/W
°C
Unit
A
J
Min.
30
Typ.
Max.
Unit
V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
2/8
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STY60NK30Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source
Breakdown Voltage
ID = 1 mA, VGS = 0
300
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20 V
±10
VGS(th) Gate Threshold Voltage
VDS = VGS, ID = 100 µA
3 3.75 4.5
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 30 A
0.033 0.045
DYNAMIC
Symbol
Parameter
gfs (1) Forward Transconductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Coss eq. (3) Equivalent Output
Capacitance
SWITCHING ON
Symbol
Parameter
td(on)
tr
Turn-on Delay Time
Rise Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Test Conditions
VDS = 15 V, ID = 30 A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
VGS = 0V, VDS = 0V to 240V
Test Conditions
VDD = 150 V, ID = 30 A
RG = 4.7Ω , VGS = 10 V
(Resistive Load see, Figure 3)
VDD = 240 V, ID = 60 A,
VGS = 10 V
Min.
Typ.
29
7200
1070
250
880
Typ.
50
90
220
46
123
Max.
Max.
SWITCHING OFF
Symbol
Parameter
td(off)
tf
Turn-off Delay Time
Fall Time
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 150 V, ID = 30 A
RG = 4.7, VGS = 10 V
(Resistive Load see, Figure 3)
VDD = 240 V, ID = 60 A,
RG = 4.7Ω, VGS = 10V
(Inductive Load see, Figure 5)
Min.
Typ.
150
60
40
65
110
Max.
Unit
V
µA
µA
µA
V
Unit
S
pF
pF
pF
pF
Unit
ns
ns
nC
nC
nC
Unit
ns
ns
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
60 A
240 A
VSD (1) Forward On Voltage
ISD = 60 A, VGS = 0
1.6 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 60 A, di/dt = 100 A/µs
VR = 100 V, Tj = 150°C
(see test circuit, Figure 5)
475 ns
6.4 µC
27 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.
3/8
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