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Application Note
TENTATIVE
Mitsubishi Semiconductors <Dual-In-Line Package Intelligent Power Module>
PS21067
Transfer-Mold Type
Insulated Type
Maximum Ratings (Tj=25°C, unless otherwise noted):
Inverter Part:
Item
Symbol
Condition
Rating
Unit
Supply voltage
VCC Applied between P-NU,NV,NW
450 V
Supply voltage (surge)
Collector-emitter voltage
VCC(surge) Applied between P-NU,NV,NW
VCES
500 V
600 V
Each IGBT collector current
±IC Tc=25°C
30 A
Each IGBT collector current (peak)
Collector dissipation
±ICP
PC
Tc=25°C, less than 1ms
Tc=25°C, per 1 chip
60 A
60.6 W
Junction temperature
T
(Note 1) -20~+125
°C
(Note 1) The maximum junction temperature rating of the power chips integrated within the DIP-IPM is 150°C(@Tc100°C). However,
in order to ensure safe operation of the DIP-IPM, the average junction temperature should be limited to
Tj(ave)125°C(@Tc100°C).
Control (Protection) Part
Item
Control supply voltage
Control supply voltage
Input voltage
Fault output supply voltage
Fault output current
Current sensing input voltage
Symbol
VD
VDB
VIN
VFO
IFO
VSC
Condition
Applied between VP1-VPC,VN1-VNC
Applied between VUFB-VUFS,
VVFB-VVFS ,VWFB-VWFS
Applied between UP,VP,WP-VPC,
UN,VN,WN-VNC
Applied between Fo-VNC
Sink current at Fo terminal
Applied between CIN-VNC
Rating
20
20
-0.5~VD+0.5
-0.5~VD+0.5
1
-0.5~VD+0.5
Unit
V
V
V
V
mA
V
Total System
Item
Self protection supply voltage limit
(short circuit protection capability)
Module case operation temperature
Storage temperature
Isolation voltage
(Note 2) Tc measurement position
Symbol
VCC(PROT)
Tc
Tstg
Viso
Condition
VD=13.5~16.5V, Inverter part
Tj=125°C, non-repetitive
less than 2µs
(Note 2)
60Hz, Sinusoidal, AC 1 minutes,
connection pins to heat-sink plate
Rating
400
Unit
V
-20~+100
-40~+125
2500
°C
°C
Vrms
Control terminals
Heat sink boundary
Power terminals Tc
Heat sink
Tc
DIP-IPM
DPH3919e
(2/7)
Free Datasheet http://www.Datasheet4U.com

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Application Note
TENTATIVE
Mitsubishi Semiconductors <Dual-In-Line Package Intelligent Power Module>
PS21067
Transfer-Mold Type
Insulated Type
Thermal Resistance :
Item
Symbol
Condition
Min. Typ. Max. Unit
Junction to case thermal Rth(j-c)Q Inverter IGBT part (per 1/6 module)
1.65
resistance
Rth(j-c)F Inverter FWD part (per 1/6 module)
Contact thermal resistance
Note 3
Rth(c-f)
Between case and fin with grease
applied (per 1 module)
2.55 °CW
0.047
Note 3Grease with good thermal conductivity and long-term endurance should be applied evenly with about +100µm+200µm on
the contacting surface of DIP-IPM and heat-sink.
Electrical Characteristics ( Tj=25°C, unless otherwise noted ) :
Inverter Part
Item Symbol
Condition
Collector-emitter
saturation voltage
FWD forward voltage
Switching time
Collector-emitter
cut-off current
VCE(sat)
VEC
ton
trr
tc(on)
toff
tc(off)
ICES
VD=VDB=15V
T=25°C
VIN=5V, IC=30A,
T=125°C
T=25°C, VIN=0V, -IC=30A
VCC=300V, VD=VDB=15V
VIN=05V, IC=30A
T=125°C
Inductive load (upper-lower arm)
VCEVCES
T=25°C
T=125°C
Min. Typ. Max. Unit
1.60 2.10
1.70 2.20
V
1.50 2.00 V
0.70 1.30 1.90
0.30
0.40 0.60 µs
1.70 2.40
0.50 0.80
1
10
mA
Control (Protection) Part :
Item Symbol
Condition
Min. Typ. Max. Unit
Circuit current
Fo output voltage
ID
VFOH
VFOL
VD=VDB=15V Total of VP1-VPC,VN1-VNC
VIN=5V
VUFB-VUFS,VVFB-VVFS,VWFB-VWFS
VD=VDB=15V Total of VP1-VPC,VN1-VNC
VIN=0V
VUFB-VUFS,VVFB-VVFS,VWFB-VWFS
Vsc=0V, Fo circuit:10kto 5V pull-up
Vsc=1V, IFO=1mA
4.9
7.00
0.55
7.00
mA
0.55
0.95
V
Input current
IIN VIN=5V
short circuit trip level VSC(ref) T=25°C, VD=15V
1.0
(Note 4) 0.43
1.5
0.48
2.0 mA
0.53 V
UVDBt Tj125°C
Trip level
10.0 12.0
Control supply under- UVDBr
voltage protection
UVDt
Reset level
Trip level
10.5
10.3
12.5
12.5
V
UVDr
Reset level
10.8 13.0
Fault output pulse width
tFO CFO=22nF
(Note 5) 1.0 1.8
ms
ON threshold voltage Vth(on) Applied between UP,VP,WP-VPC,
OFF threshold voltage Vth(off) UN,VN,WN-VNC
2.1
0.8
2.3
1.4
2.6
2.1
V
(Note 4) Short circuit protection is functioning only for N-side IGBTs. Please select the external shunt resistance such that the SC
trip-level is less than 1.7 times of the rated current.
(Note 5) Fault signal is output when the lower arms short circuit or control supply under-voltage protective functions operate. The
fault output pulse-width tFO depends on the capacitance value of CFO (CFO= 12.2 × 10-6 × tFO [F])
DIP-IPM
DPH3919e
(3/7)
Free Datasheet http://www.Datasheet4U.com

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Application Note
TENTATIVE
Mitsubishi Semiconductors <Dual-In-Line Package Intelligent Power Module>
PS21067
Transfer-Mold Type
Insulated Type
Mechanical Characteristics and Ratings:
Item Condition
Mounting torque
Mounting screw: (M4) Recommended: 1.18N·m
Weight
Heat-sink flatness
(Note 6)
(Note 6)
Min.
0.98
50
Typ.
77
Max.
1.47
100
Unit
N·m
g
µm
+-
Measurement position
3.25mm
Heat-sink side
Heat-sink side
Recommended Operation Conditions :
Item Symbol
Condition
Recommended
Unit
Min. Typ. Max.
Supply voltage
Control supply voltage
Control supply voltage
Control supply variation
Arm-shoot-through blocking time
PWM input frequency
VCC
VD
VDB
VD,VDB
tdead
fPWM
PWIN(on)
Applied between P-NU,NV,NW
Applied between VP1-VPC,VN1-VNC
Applied between
VUFB-VUFS,VVFB-VVFS,VWFB-VWFS
For each input signal, Tc100°C
Tc100°C, Tj125°C
(Note 7)
0 300 400
13.5 15.0 16.5
13.0 15.0 18.5
-1 +1
2.0 - -
- - 20
0.3 - -
V
V
V
V/µs
µs
kHz
Minimum input pulse width
PWIN(off)
200VCC350V,
13.5VD16.5V,
13.0VDB18.5V,
-20Tf100°C,
N line wiring inductance
IC30A
30<IC51A
1.5
3.0
µs
less than 10nH (Note 8)
VNC variation
VNC
Potential difference between
VNC-NU,NV,NW including surge voltage
-5.0
+5.0
V
(Note 7) DIP-IPM might make no response to the input on signal with pulse width less than PWIN(on).
(Note 8) DIP-IPM might make no response to the input off signal with pulse width less than PWIN(off), or P-side only the turn on
time becomes long as shown in Fig.2. However, off-latch will not happen for next input on signal in this case. For the
wiring inductance of N line, please refer to Fig.6.
Fig.2 Output behavior under short input off signal with pulse width less than PWIN(off)
P-side control input
(P-side only)
IGBT gate
Output current
t2 t1
Real line: off pulse width larger than PWIN(off)
turn on time is t1 (conventional value)
Broken line: off pulse width less than PWIN(off)
turn on time is t2 (t2 > t1)
DIP-IPM
DPH3919e
(4/7)
Free Datasheet http://www.Datasheet4U.com

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Application Note
TENTATIVE
Mitsubishi Semiconductors <Dual-In-Line Package Intelligent Power Module>
PS21067
Transfer-Mold Type
Insulated Type
Fig.3 DIP-IPM Internal Circuit
VUFB
VUFS
VP1
UP
VVFB
VVFS
VP1
VP
VW FB
VW FS
VP1
WP
VPC
VN1
Fo
UN
VN
WN
VNC
HVIC1
VCC
VB
IN HO
COM VS
HVIC2
VCC
VB
IN HO
COM VS
HVIC3
VCC
VB
IN HO
COM VS
LVIC
UOUT
VCC
UVNO
Fo
VOUT
UN VVNO
VN
WN WOUT
W VNO
GND
CIN
CFO
IGBT1
Di1
DIP-IPM
P
U
IGBT2
Di2
V
IGBT3
Di3
IGBT4
Di4
IGBT5
Di5
IGBT6
Di6
W
NU
NV
NW
CIN
CFO
DIP-IPM
DPH3919e
(5/7)
Free Datasheet http://www.Datasheet4U.com