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®
Data Sheet
ISL6266, ISL6266A
June 14, 2010
FN6398.3
Two-phase Core Controllers
(Montevina, IMVP-6+)
The ISL6266 and ISL6266A are two-phase buck converter
regulators implementing Intel® IMVP-6 protocol with
embedded gate drivers. Both converters use interleaved
channels to double the output voltage ripple frequency and
thereby reduce output voltage ripple amplitude with fewer
components, lower component cost, reduced power
dissipation, and smaller real estate area.
The ISL6266A utilizes the patented R3 Technology™,
Intersil’s Robust Ripple Regulator modulator. Compared with
traditional multiphase buck regulators, the R3 Technology™
has the fastest transient response. This is due to the R3
modulator commanding variable switching frequency during
load transient events.
Intel Mobile Voltage Positioning (IMVP) is a smart voltage
regulation technology, which effectively reduces power
dissipation in Intel Pentium processors. To boost battery life,
the ISL6266A supports DPRSLRVR (deeper sleep),
DPRSTP# and PSI# functions, which maximizes efficiency
by enabling different modes of operation. In active mode
(heavy load), the regulator commands the two phase
continuous conduction mode (CCM) operation. When PSI#
is asserted in active mode (medium load), the ISL6266A
operates in one-phase CCM. When the CPU enters deeper
sleep mode, the ISL6266A enables diode emulation to
maximize efficiency.
For better system power management, the ISL6266A
provides a CPU power monitor output. The analog output at
the power monitor pin can be fed into an A/D converter to
report instantaneous or average CPU power.
A 7-bit digital-to-analog converter (DAC) allows dynamic
adjustment of the core output voltage from 0.300V to 1.500V.
Over-temperature, the ISL6266A achieves a 0.5% system
accuracy of core output voltage.
A unity-gain differential amplifier is provided for remote CPU
die sensing. This allows the voltage on the CPU die to be
accurately measured and regulated per Intel IMVP-6+
specifications. Current sensing can be realized using either
lossless inductor DCR sensing or discrete resistor sensing.
A single NTC thermistor network thermally compensates the
gain and the time constant of the DCR variations.
The ISL6266 also includes all the functions for IMVP-6+
core power delivery. In addition, it has been optimized for
use with coupled-inductor solutions. More information on the
differences between ISL6266 and ISL6266A can be found in
the “Electrical Specifications” on page 3 and the “ISL6266
Features” on page 21.
Features
• Precision Two/One-phase CORE Voltage Regulator
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
• Internal Gate Driver with 2A Driving Capability
• Dynamic Phase Adding/Dropping
• Microprocessor Voltage Identification Input
- 7-Bit VID Input
- 0.300V to 1.500V in 12.5mV Steps
- Support VID Change On-the-Fly
• Multiple Current Sensing Schemes Supported
- Lossless Inductor DCR Current Sensing
- Precision Resistive Current Sensing
• CPU Power Monitor
• Thermal Monitor
• User Programmable Switching Frequency
• Differential Remote CPU Die Voltage Sensing
• Static and Dynamic Current Sharing
• Support All Ceramic Output with Coupled Inductor
(ISL6266)
• Overvoltage, Undervoltage and Overcurrent Protection
• Pb-Free (RoHS Compliant)
Ordering Information
PART NUMBER
PART
(Note)
MARKING
TEMP.
RANGE
(°C)
PACKAGE PKG.
(Pb-free) DWG. #
ISL6266HRZ ISL6266 HRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266HRZ-T* ISL6266 HRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266AHRZ ISL6266A HRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266AHRZ-T* ISL6266A HRZ -10 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266AIRZ ISL6266A IRZ -40 to +100 48 Ld 7x7 QFN L48.7x7
ISL6266AIRZ-T* ISL6266A IRZ -40 to +100 48 Ld 7x7 QFN L48.7x7
*Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets, molding compounds/die attach materials, and
100% matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007-2010 All Rights Reserved. R3 Technology™ is a trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
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Pinout
ISL6266, ISL6266A
ISL6266, ISL6266A
(48 LD 7x7 QFN)
TOP VIEW
48 47 46 45 44 43 42 41 40 39 38 37
PGOOD 1
PSI# 2
PMON 3
RBIAS 4
VR_TT# 5
NTC 6
SOFT 7
OCSET 8
VW 9
COMP 10
FB 11
FB2 12
GND PAD
(BOTTOM)
36 BOOT1
35 UGATE1
34 PHASE1
33 PGND1
32 LGATE1
31 PVCC
30 LGATE2
29 PGND2
28 PHASE2
27 UGATE2
26 BOOT2
25 NC
13 14 15 16 17 18 19 20 21 22 23 24
2 FN6398.3
June 14, 2010
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ISL6266, ISL6266A
Absolute Maximum Ratings
Supply Voltage (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7V
Battery Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +28V
Boot Voltage (BOOT) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +33V
Boot to Phase Voltage (BOOT to PHASE). . . . . . -0.3V to +7V (DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +9V (<10ns)
Phase Voltage (PHASE) . . . . . . . . . -7V (<20ns Pulse Width, 10µJ)
UGATE Voltage (UGATE) . . . . . . . . . . PHASE -0.3V (DC) to BOOT
. . . . . . . . . . . . . .PHASE-5V (<20ns Pulse Width, 10µJ) to BOOT
LGATE Voltage (LGATE) . . . . . . . . . . . -0.3V (DC) to (VDD + 0.3V)
. . . . . . . . . . . . . .-2.5V (<20ns Pulse Width, 5µJ) to (VDD + 0.3V)
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VDD + 0.3V)
Open Drain Outputs, PGOOD, VR_TT# . . . . . . . . . . . -0.3V to +7V
Thermal Information
Thermal Resistance (Typical)
θJA°C/W θJC°C/W
QFN Package (Notes 1, 2). . . . . . . . . .
29
4.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±5%
Battery Voltage, VIN. . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to 25V
Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . -40°C to +100°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . -40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications VDD = 5V, TA = -40°C to +100°C, unless otherwise specified.
PARAMETER
INPUT POWER SUPPLY
+5V Supply Current
+3.3V Supply Current
Battery Supply Current at VIN pin
POR (Power-On Reset) Threshold
SYSTEM AND REFERENCES
System Accuracy ( ISL6266AHRZ)
System Accuracy (ISL6266AIRZ)
RBIAS Voltage
Boot Voltage
Output Voltage Range
VID Off State
SYMBOL
TEST CONDITIONS
IVDD
I3V3
IVIN
PORr
PORf
VR_ON = 3.3V
VR_ON = 0V
No load on CLK_EN#
VR_ON = 0V, VIN = 25V
VDD Rising
VDD Falling
%Error
(VCC_CORE)
%Error
(Vcc_core)
RRBIAS
VBOOT
VCC_CORE
(max)
VCC_CORE
(min)
No load, closed loop, active mode,
TA = 0°C to +100°C, VID = 0.75V to 1.5V
VID = 0.5V to 0.7375V
VID = 0.3V to 0.4875V
No load, closed loop, active mode,
VID = 0.75V to 1.5V
VID = 0.5V to 0.7375V
VID = 0.3V to 0.4875V
RRBIAS = 147kΩ
VID = [0000000]
VID = [1100000]
VID = [1111111]
MIN
(Note 4)
TYP
MAX
(Note 4) UNITS
5.1 5.7 mA
1 µA
1 µA
1 µA
4.35 4.5 V
4.0 4.15
V
-0.5 0.5 %
-8 8 mV
-15 15 mV
-0.8 0.8 %
-10 10 mV
-18 18 mV
1.45 1.47 1.49 V
1.188
1.2
1.212
V
1.5 V
0.3 V
0V
3 FN6398.3
June 14, 2010
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ISL6266, ISL6266A
Electrical Specifications
PARAMETER
VDD = 5V, TA = -40°C to +100°C, unless otherwise specified. (Continued)
SYMBOL
TEST CONDITIONS
MIN
(Note 4)
CHANNEL FREQUENCY
Nominal Channel Frequency
fSW ISL6266, 2 channel operation
ISL6266A, 2 channel operation
410
280
Adjustment Range
100
AMPLIFIERS
Droop Amplifier Offset
-0.25
Error Amp DC Gain
Error Amp Gain-Bandwidth Product
Error Amp Slew Rate
FB Input Current
ISEN
AV0
GBW
SR
IIN(FB)
(Note 3)
CL = 20pF (Note 3)
CL = 20pF (Note 3)
Imbalance Voltage
Input Bias Current
SOFT-START CURRENT
Soft-Start Current
Soft Geyserville Current
Soft Deeper Sleep Entry Current
Soft Deeper Sleep Exit Current
Soft Deeper Sleep Exit Current
GATE DRIVER DRIVING CAPABILITY
ISS
IGV
IC4
IC4EA
IC4EB
|SOFT - REF| > 100mV
DPRSLPVR = 3.3V
DPRSLPVR = 3.3V
DPRSLPVR = 0V
-47
±180
-47
37
180
UGATE Source Resistance
RSRC(UGATE) 500mA Source Current (Note 3)
UGATE Source Current
ISRC(UGATE) VUGATE_PHASE = 2.5V (Note 3)
UGATE Sink Resistance
RSNK(UGATE) 500mA Sink Current (Note 3)
UGATE Sink Current
ISNK(UGATE) VUGATE_PHASE = 2.5V (Note 3)
LGATE Source Resistance
RSRC(LGATE) 500mA Source Current (Note 3)
LGATE Source Current
ISRC(LGATE) VLGATE = 2.5V (Note 3)
LGATE Sink Resistance
RSNK(LGATE) 500mA Sink Current (Note 3)
LGATE Sink Current
ISNK(LGATE) VLGATE = 2.5V (Note 3)
UGATE to PHASE Resistance
Rp(UGATE)
GATE DRIVER SWITCHING TIMING (refer to “ISL6266, ISL6266A Gate Driver Timing Diagram” on page 6)
UGATE Rise Time
LGATE Rise Time
UGATE Fall Time
LGATE Fall Time
UGATE Turn-on Propagation Delay
tRU
tRL
tFU
tFL
tPDHU
ISL6266AHRZ
tPDHU
ISL6266AIRZ
PVCC = 5V, 3nF Load (Note 3)
PVCC = 5V, 3nF Load (Note 3)
PVCC = 5V, 3nF Load (Note 3)
PVCC = 5V, 3nF Load
TA = -10°C to +100°C
PVCC = 5V, Outputs Unloaded
PVCC = 5V, Outputs Unloaded
20
18
TYP
440
300
90
18
5
10
20
-42
±205
-42
42
205
1
2
1
2
1
2
0.5
4
1
8.0
8.0
8.0
4.0
30
30
MAX
(Note 4) UNITS
470 kHz
320 kHz
600 kHz
0.25 mV
dB
MHz
V/µs
150 nA
2 mV
nA
-37
±230
-37
47
230
µA
µA
µA
µA
µA
1.5 Ω
A
1.5 Ω
A
1.5 Ω
A
0.9 Ω
A
kΩ
ns
ns
ns
ns
44 ns
44 ns
4 FN6398.3
June 14, 2010
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ISL6266, ISL6266A
Electrical Specifications
PARAMETER
VDD = 5V, TA = -40°C to +100°C, unless otherwise specified. (Continued)
SYMBOL
TEST CONDITIONS
MIN
(Note 4)
LGATE Turn-on Propagation Delay
tPDHL
ISL6266AHRZ
tPDHL
ISL6266AIRZ
TA = -10°C to +100°C
PVCC = 5V, Outputs Unloaded
PVCC = 5V, Outputs Unloaded
7
5
BOOTSTRAP DIODE
Forward Voltage
Leakage
POWER GOOD and PROTECTION MONITOR
VDDP = 5V, Forward Bias Current = 2mA
VR = 16V
0.43
PGOOD Low Voltage
PGOOD Leakage Current
PGOOD Delay
Overvoltage Threshold
Severe Overvoltage Threshold
OCSET Reference Current
OC Threshold Offset
VOL
IOH
tpgd
OVH
OVHS
IPGOOD = 4mA
PGOOD = 3.3V
CLK_EN# Low to PGOOD High
VO rising above setpoint >1ms
VO rising above setpoint >0.5µs
I(RBIAS) = 10µA
DROOP rising above OCSET >120µs
-1
6.3
155
1.675
9.8
-3.5
Current Imbalance Threshold
Difference between ISEN1 and ISEN2 >1ms
Undervoltage Threshold
(VDIFF-SOFT)
UVf VO falling below setpoint for >1ms
-360
LOGIC INPUTS
VR_ON, DPRSLPVR Input Low
VR_ON, DPRSLPVR Input High
Leakage Current of VR_ON
Leakage Current of DPRSLPVR
DAC(VID0-VID6), PSI# and
DPRSTP# Input Low
VIL(3.3V)
VIH(3.3V)
IIL(3.3V)
Logic input is low
IIH(3.3V)
Logic input is high at 3.3V
IIL_DPRSLP(3.3V) DPRSLPVR input is low
IIH_DPRSLP(3.3V) DPRSLPVR input is high at 3.3V
VIL(1V)
2.3
-1
-1
DAC(VID0-VID6), PSI# and
DPRSTP# Input High
VIH(1V)
0.7
Leakage Current of DAC
(VID0-VID6), PSI# and DPRSTP#
THERMAL MONITOR
IIL(1V)
IIH(1V)
Logic input is low
Logic input is high at 1V
-1
NTC Source Current
NTC = 1.3V
53
Over-Temperature Threshold
V(NTC) falling
1.18
VR_TT# Low Output Resistance
POWER MONITOR
RTT I = 20mA
PMON Output Voltage Range
PMON Maximum Voltage
Vpmon
Vpmonmax
VSEN = 1.2V, Droop - VO = 80mV
VSEN = 1V, Droop - VO = 20mV
1.638
0.308
2.8
TYP
15
15
0.58
0.26
7.6
195
1.7
10
9
-300
0
0
0
0.45
0
0.45
60
1.2
6.5
1.680
0.350
3.0
MAX
(Note 4) UNITS
30 ns
30 ns
0.72 V
1 µA
0.4
1
8.9
235
1.725
10.2
3.5
-240
V
µA
ms
mV
V
µA
mV
mV
mV
1V
V
µA
1 µA
µA
1 µA
0.3 V
V
µA
1 µA
67 µA
1.22 V
9Ω
1.722
0.392
V
V
V
5 FN6398.3
June 14, 2010
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