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Si7860DP
Vishay Siliconix
N-Channel Reduced Qg, Fast Switching MOSFET
PRODUCT SUMMARY
VDS (V)
rDS(on) (Ω)
0.008 at VGS = 10 V
30
0.011 at VGS = 4.5 V
ID (A)
18
15
PowerPAK SO-8
6.15 mm
D
8D
7
D
6
D
5
S
1S
5.15 mm
2
S
3G
4
Bottom View
Ordering Information: Si7860DP-T1
Si7860DP-T1-E3 (Lead (Pb)-free)
FEATURES
• TrenchFET® Power MOSFET
• PWM Optimized for High Efficiency
Available
• New Low Thermal Resistance
RoHS*
PowerPAK® Package with Low 1.07 mm COMPLIANT
Profile
• 100 % Rg Tested
APPLICATIONS
• Buck Converter
- High Side or Low Side
• Synchronous Rectifier
- Secondary Rectifier
D
G
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
10 secs
Steady State
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (TJ = 150 °C)a
Pulsed Drain Current
Continuous Source Current (Diode Continuous)a
TA = 25 °C
TA = 70 °C
VDS
VGS
ID
IDM
IS
30
± 20
18 11
15 8
± 50
4.1 1.5
Avalanche Current
Single Pulse Avalanche Energy
Maximum Power Dissipationa
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)b,c
L 0.1 mH
TA = 25 °C
TA = 70 °C
IAS
EAS
PD
TJ, Tstg
30
45
5 1.8
3.2 1.1
- 55 to 150
260
Unit
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Unit
Maximum Junction-to-Ambient (MOSFET)a
t 10 sec
Steady State
RthJA
20
56
25
70 °C/W
Maximum Junction-to-Case (Drain)
Steady State
RthJC
1.8
2.3
Notes:
a. Surface Mounted on 1" x 1" FR4 Board.
b. See Solder Profile (http://www.vishay.com/ppg?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is
not required to ensure adequate bottom side solder interconnection.
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
* Pb containing terminations are not RoHS compliant, exemptions may apply.
Document Number: 71854
S-52555-Rev. D, 19-Dec-05
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Si7860DP
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Static
Gate Threshold Voltage
VGS(th)
VDS = VGS, ID = 250 µA
Gate-Body Leakage
IGSS
VDS = 0 V, VGS = ± 20 V
Zero Gate Voltage Drain Current
IDSS
VDS = 30 V, VGS = 0 V
VDS = 30 V, VGS = 0 V, TJ = 70 °C
On-State Drain Currenta
ID(on)
VDS 5 V, VGS = 10 V
Drain-Source On-State Resistancea rDS(on)
VGS = 10 V, ID = 18 A
VGS = 4.5 V, ID = 15 A
Forward Transconductancea
gfs
VDS = 15 V, ID = 18 A
Diode Forward Voltagea
VSD IS = 3 A, VGS = 0 V
Dynamicb
Total Gate Charge
Qg
Gate-Source Charge
Qgs VDS = 15 V, VGS = 4.5 V, ID = 18 A
Gate-Drain Charge
Qgd
Gate Resistance
Rg
Turn-On Delay Time
td(on)
Rise Time
Turn-Off Delay Time
tr
td(off)
VDD = 15 V, RL = 15 Ω
ID 1 A, VGEN = 10 V, RG = 6 Ω
Fall Time
tf
Source-Drain Reverse Recovery
Time
trr
IF = 3 A, di/dt = 100 A/µs
Notes:
a. Pulse test; pulse width 300 µs, duty cycle 2 %.
b. Guaranteed by design, not subject to production testing.
Min Typ Max Unit
1.0 3.0
± 100
1
5
40
0.0066 0.008
0.0090 0.011
60
0.70 1.1
V
nA
µA
A
Ω
S
V
13 18
5 nC
4.0
0.5 1.7 3.2
Ω
18 27
12 18
46 70 ns
19 30
40 70
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS 25 °C, unless noted
50
VGS = 10 thru 4 V
40
30
20
3V
10
0
0 2 4 6 8 10
VDS - Drain-to-Source Voltage (V)
Output Characteristics
50
40
30
20
TC = 125 °C
10
25 °C
- 55 °C
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VGS - Gate-to-Source Voltage (V)
Transfer Characteristics
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Document Number: 71854
S-52555-Rev. D, 19-Dec-05

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TYPICAL CHARACTERISTICS 25 °C, unless noted
0.015
0.012
0.009
0.006
VGS = 4.5 V
VGS = 10 V
0.003
0.000
0
6
5
102 03 04 05
ID - Drain Current (A)
On-Resistance vs. Drain Current
VDS = 15 V
ID = 16 A
4
3
2
1
0
0 4 8 12 16
Qg - Total Gate Charge (nC)
Gate Charge
60
0
20
TJ = 150 °C
10
TJ = 25 °C
1
0.00 0.2 0.4 0.6 0.8 1.0
VSD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
1.2
Document Number: 71854
S-52555-Rev. D, 19-Dec-05
Si7860DP
Vishay Siliconix
2500
2000
1500
Ciss
1000
500
Crss
Coss
0
0 6 12 18 24
VDS - Drain-to-Source Voltage (V)
Capacitance
2.00
1.75
VGS = 10 V
ID = 16 A
1.50
30
1.25
1.00
0.75
0.50
- 50 - 25
0
25 50 75 100 125 150
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
0.040
0.032
0.024
0.016
0.008
ID = 16 A
0.000
0 2 4 6 8 10
VGS - Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
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Si7860DP
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless noted
0.6
ID = 250 μA
0.3
0.0
200
160
120
- 0.3
80
- 0.6
40
- 0.9
- 50 - 25
0 25 50 75 100 125 150
TJ - Temperature (°C)
Threshold Voltage
2
1
Duty Cycle = 0.5
0
0.001
0.01 0.1
Time (sec)
1
10
Single Pulse Power, Junction-to-Ambient
0.2
0.1
0.1
0.05
0.02
0.01
10 - 4
Single Pulse
10 - 3
Notes:
PDM
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = R thJA = 125 °C
3. TJM - TA = PDMZthJA(t)
4. Surface Mounted
10 - 2
10 - 1
1
10
Square Wave Pulse Duration (sec)
Normalized Thermal Transient Impedance, Junction-to-Ambient
100
600
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10 - 4
10 - 3
10 - 2
Square Wave Pulse Duration (sec)
10 - 1
Normalized Thermal Transient Impedance, Junction-to-Case
1
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see http://www.vishay.com/ppg?71854.
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Document Number: 71854
S-52555-Rev. D, 19-Dec-05

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Document Number: 91000
Revision: 18-Jul-08
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