TFG1200.pdf 데이터시트 (총 7 페이지) - 파일 다운로드 TFG1200 데이타시트 다운로드

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ADVANCE INFO
TFG1200
200V High-Side / Low-Side
eGaN Gate Driver
Features
Description
Floating high-side driver in bootstrap operation to 200V
1.2A/5A peak source/sink current
0.4Ω/2Ω pull down/pull up impedance
Internal bootstrap supply voltage clamped to 5.2V
Independent high-side and low-side logic inputs
Proprietary bootstrap capacitor auto-recharge
technology
Fast propagation delays (25ns typical)
Separate source and sink outputs
Applications
The TFG1200 is a high-side/low-side gate driver uniquely
designed to drive enhancement mode Gallium Nitride (eGaN)
FETs. The TFG1200 provides the special requirements of an
eGaN FET driver: supply clamping, low pull-up and pull-down
impedance, and high peak currents all within a single IC. A
higher sink capability maintains the gate drive line at a low level
during the fast dv/dt of the eGaN FET without unintended turn
on of the FET. Fast propagation delays, fast rise times, and a
proprietary bootstrap capacitor auto-recharge allow higher
switching frequencies allowing smaller component footprints;
and with the integrated bootstrap diode the required area
compared to a discrete solution is greatly reduced.
High Speed DC-DC Conversion
Hard Switched and High Frequency Power Supplies
Class D Audio
TDFN-10
Typical Application
Ordering Information
Year Week Lot Lot
PART NUMBER (NOTE1) PACKAGE
MARK
top botm
TFG1200-NBX
TDFN-10
YWLL
TBD
NOTE1 REPLACE X with P for 180 mm Tape & Reel Packing (Qty 3,000)
or Q for 330 mm Tape & Reel Packing (Qty 10,000).
VCC
VCC
HI
HI
VCC UV
Detect
High Voltage Well
VB UV
Detect
5.2 V
Clamp
HV Level
Shift
VB
HOH
HOL
VSW
Up to 200V
to Load
LI
LI
GND
Control
TFG1200
LOH
LOL
www.telefunkensemiconductors.com
April 1210,122012
ADVANCE INFO
1http://www.Datasheet4U.com

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Pin Diagrams
VSW 1
10 LOL
VSW 2
TFG1200
HOL 3
9 LOH
8 VCC
HOH 4
7 LI
VB 5
6 HI
Top View: TDFN-10
(3x3mm, 10 pin, Pad Size: 1.8x2.5mm)
Pin Descriptions
PIN NAME
VSW
VSW
HOL
HOH
VB
HI
LI
VCC
LOH
LOL
GND
DFN PIN NUMBER
1
2
3
4
5
6
7
8
9
10
PAD
PIN DESCRIPTION
High-side bootstrap return
High-side bootstrap return
High-side gate driver sink output
High-side gate driver source output
High-side bootstrap supply
High-side gate driver control input
Low-side gate driver control input
5V gate drive and control supply
Low-side gate driver source output
Low-side gate driver sink output
Low-side and control ground
ADVANCE INFO
TFG1200
200V High-Side / Low-Side
eGaN Gate Driver
April 1210,122012
ADVANCE INFO
2

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ADVANCE INFO
TFG1200
Absolute Maximum Ratings (NOTE1)
A
200V High-Side / Low-Side
eGaN Gate Driver
VB - High side floating supply voltage........................-0.3V to +207V
VS - High side floating supply offset voltage......VB-7V to VB+0.3V
VHO - High side floating output voltage...............VS-0.3V to VB+0.3V
dVS / dt - Offset supply voltage transient................................50 V/ns
VCC - Logic & low side fixed supply voltage....................-0.3V to +7V
VLO - Low side output voltage................................-0.3V to VCC+0.3V
VIN - Logic input voltage (HI & LI)................................-0.3V to +7V
PD - Package power dissipation at TA ≤ 25 °C
TDFN-10...............................................................................................TBD
TDFN-10 Thermal Resistance (NOTE2)
qJA..................................................................................................TBD °C/W
TJ - Junction operating temperature .......................................+150 °C
TL - Lead temperature (soldering, 10s) .................................. +300 °C
Tstg - Storage temperature range ............................-55 °C to +150 °C
ESD Susceptibility
HBM (NOTE3)..........................................................................................2 kV
MM (NOTE4)........................................................................................200 V
CDM (NOTE5)........................................................................................1.5 kV
NOTE1 Stresses beyond those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
NOTE2 Thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
NOTE3 Human Body Model, applicable standard JESD22-A114
NOTE4 Machine Model, applicable standard JESD22-A115
NOTE5 Field Induced Charge Device Model, applicable standard JESD22-C101
Recommended Operating Conditions (NOTE6)
Symbol Parameter
VB High side floating supply absolute voltage
VS High side floating supply offset voltage
VHO High side floating output voltage
VCC Low side fixed supply voltage
VLO Low side output voltage
VIN Logic input voltage (HI & LI)
TA Ambient temperature
NOTE6 Voltage amplitudes referenced to GND.
MIN
VS + 4
-5
VS
4.5
0
0
-40
MAX
VS + 5.5
200
VB
5.5
VCC
5
125
Unit
V
V
V
V
V
V
°C
April 1210,122012
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ADVANCE INFO
TFG1200
DDCCEEleleccttrricicalaCl hCahraacrtaercistteicrsistics
200V High-Side / Low-Side
eGaN Gate Driver
All specifications at TJ = 25°C, VCC = VB = 5V, VSW = GND = 0V, and no load on LOL, HOL,
HOH, and HOL unless otherwise specified
Symbol
VCC
ICCQ
ICCO
IVBQ
IVBO
TJ
Parameter
Supply Voltage
VCC quiescent current
VCC operating current
VB quiescent current
VB operating current
Junction temperature
Conditions
LI=HI=0V
f=500kHz
LI=HI=0V
f=500kHz
Min Typ Max Unit
4.5 5.0
5.5 V
50 µA
0.5 mA
80 µA
1.0 mA
-40 200 °C
VIH
VIL
VIHYS
VCCUV+
VCCUV-
VVBUV+
VVBUV-
VBSClamp
VDL
VDH
VDB
RPU
RPD
IOH
IOL
IOHLK
IOLLK
Logic high input
Logic low input
Input hysteresis
VCC supply undervoltage
positive going threshold
VCC supply undervoltage
negative going threshold
VB supply undervoltage
positive going threshold
VB supply undervoltage
negative going threshold
VB – VSW clamp
Bootstrap diode low-
current forward voltage
Bootstrap diode hi-current
forward voltage
Bootstrap diode
breakdown voltage
Gate driver pull up
impedance
Gate driver pull down
impedance
Peak source current
Peak sink current
High-level output leakage
current
Low-level output leakage
current
Rising edge at LI
and HI
Falling edge at
LI and HI
IVCC-VB = 100µA
IVCC-VB = 100µA
VSAT = 100mV
VSAT = 100mV
HOH=LOH=5V,
CL = 10nF
HOL=LOL=0V,
CL = 10nF
HOH=LOH=0V
HOL=LOL=5V
4.7
200
3.8
1.2
2.5
3.7
3.5
3.7
3.5
5.2
0.6
0.9
1.7
0.4
1.2
5
1.5
1.5
V
V
V
V
V
V
V
5.5 V
V
V
V
A
A
µA
µA
April 1210,122012
ADVANCE INFO
4

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ADVANCE INFO
TFG1200
AACCEElleeccttrricicalaCl hCahraacrtearcistteicrsistics
200V High-Side / Low-Side
eGaN Gate Driver
All specifications at TJ = 25°C, VCC = VB = 5V, VSW = GND = 0V, and no load on LOL, HOL,
HOH, and HOL unless otherwise specified
Symbol Parameter
Conditions
Min Typ Max Unit
tONL LO turn-on propagation LI rising to LOH
25
ns
delay
rising
tOFFL
LO turn-off propagation LI falling to
25 ns
delay
LOL falling
tONH HO turn-on propagation HI rising to
delay
HOH rising
25 ns
tOFFH
HO turn-off propagation HI falling to
delay
HOL falling
25 ns
tDM ON
Delay matching: LO on &
HO off
1.5 ns
tDM OFF
Delay matching: LO off &
HO on
1.5 ns
tHR HO rise time
7.0 ns
tLR LO rise time
7.0 ns
tHF HO fall time
1.5 ns
tLF LO fall time
1.5 ns
tPW Minimum input pulse
width that changes the
10 ns
output
tBS Bootstrap diode reverse IF = 100mA,
40 ns
recovery time
IR = 100mA
April 1210,122012
ADVANCE INFO
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