32-bit ARM Cortex-M3 microcontroller
Product data sheet
Two 12-bit ADC with up to 12 input channels per ADC and with multiple internal
and external trigger inputs and sample rates of up to 2 Msamples/s. Each ADC
supports two independent conversion sequences. ADC conversion clock can be
the system clock or an asynchronous clock derived from one of the three PLLs.
One 12-bit DAC.
Integrated temperature sensor and band gap internal reference voltage.
Four comparators with external and internal voltage references (ACMP0 to 3).
Comparator outputs are internally connected to the SCTimer/PWMs and ADCs and
externally to pins. Each comparator output contains a programmable glitch filter.
Three USART interfaces with DMA, RS-485 support, autobaud, and with
synchronous mode and 32 kHz mode for wake-up from Deep-sleep and
Power-down modes. The USARTs share a fractional baud-rate generator.
Two SPI controllers.
One I2C-bus interface supporting fast mode and Fast-mode Plus with data rates of
up to 1Mbit/s and with multiple address recognition and monitor mode.
One C_CAN controller.
One USB 2.0 full-speed device controller with on-chip PHY.
12 MHz internal RC oscillator trimmed to 1 % accuracy for 25 C Tamb +85 C
that can optionally be used as a system clock.
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
Watchdog oscillator with a frequency range of 503 kHz.
32 kHz low-power RTC oscillator with 32 kHz, 1 kHz, and 1 Hz outputs.
System PLL allows CPU operation up to the maximum CPU rate without the need
for a high-frequency crystal. May be run from the system oscillator or the internal
Two additional PLLs for generating the USB and SCTimer/PWM clocks.
Clock output function with divider that can reflect the crystal oscillator, the main
clock, the IRC, or the watchdog oscillator.
Integrated PMU (Power Management Unit) to minimize power consumption.
Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, and
Deep power-down mode.
APIs provided for optimizing power consumption in active and sleep modes and for
configuring Deep-sleep, Power-down, and Deep power-down modes.
Wake-up from Deep-sleep and Power-down modes on activity on USB, USART,
SPI, and I2C peripherals.
Wake-up from Sleep, Deep-sleep, Power-down, and Deep power-down modes
from the RTC alarm or wake-up interrupts.
Timer-controlled self wake-up from Deep power-down mode using the RTC
high-resolution/wake-up 1 kHz timer.
Power-On Reset (POR).
BrownOut Detect BOD).
JTAG boundary scan modes supported.
Unique device serial number for identification.
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 29 April 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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