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STP10NK60Z/FP, STB10NK60Z/-1
STH10NK60ZFI, STW10NK60Z
N-CHANNEL600V-0.65-10ATO-220/FP/D2PAK/I2PAK/TO-247/ISOWATT218
Zener-Protected SuperMESHPower MOSFET
TYPE
VDSS RDS(on)
ID
Pw
STB10NK60Z
STB10NK60Z-1
STH10NK60ZFI
STP10NK60Z
STP10NK60ZFP
STW10NK60Z
600 V
600 V
600 V
600 V
600 V
600 V
< 0.75
< 0.75
< 0.75
< 0.75
< 0.75
< 0.75
10 A
10 A
10 A
10 A
10 A
10 A
115 W
115 W
35 W
115 W
35 W
156 W
s TYPICAL RDS(on) = 0.65
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s GATE CHARGE MINIMIZED
s VERY LOW INTRINSIC CAPACITANCES
s VERY GOOD MANUFACTURING
REPEATIBILITY
TO-220
3
2
1
ISOW ATT218
3
2
1
TO-220FP
123
I2PAK
3
2
1
TO- 247
3
1
D2PAK
DESCRIPTION
The SuperMESHseries is obtained through an
extreme optimization of ST’s well established strip-
based PowerMESHlayout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmeshproducts.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
s LIGHTING
ORDERING INFORMATION
SALES TYPE
MARKING
STP10NK60Z
P10NK60Z
STP10NK60ZFP
P10NK60ZFP
STB10NK60ZT4
B10NK60Z
STB10NK60Z
B10NK60Z
STB10NK60Z-1
STH10NK60ZFI
STW10NK60Z
B10NK60Z
H10NK60FI
W10NK60Z
PACKAGE
TO-220
TO-220FP
D2PAK
D2PAK
I2PAK
ISOWATT218
TO-247
PACKAGING
TUBE
TUBE
TAPE & REEL
TUBE
(ONLY UNDER REQUEST)
TUBE
TUBE
TUBE
April 2002
1/16
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STP10NK60Z/FP, STB10NK60Z, STB10NK60Z-1, STW10NK60Z, STH10NK60ZFI
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
TO-220/ TO-220FP ISOWATT218 TO-247
D2PAK/I2PAK
VDS Drain-source Voltage (VGS =0 )
600 V
VDGR
Drain-gate Voltage (RGS =2 0 k)
600 V
VGS Gate- source Voltage
± 30 V
ID Drain Current (continuos) at TC =2 5°C
10
10 (*)
10 (*)
10 A
ID Drain Current (continuos) at TC = 100°C 5.7
5.7 (*)
5.7 (*)
5.7 A
IDM (l ) Drain Current (pulsed)
36
36 (*)
36 (*)
36 A
PTOT
Total Dissipation at TC =2 5°C
115 35
35 156 W
Derating Factor
0.92
0.28
0.28
1.25 W/°C
VESD(G-S) Gate source ESD
(HBM-C=100pF, R=1.5KΩ)
4000
V
dv/dt (1) Peak Diode Recovery voltage slope
4.5 V/ns
VISO
Insulation Withstand Voltage (DC)
-
2500
2000
-V
Tj Operating Junction Temperature
Tstg Storage Temperature
-55 to 150
°C
(l ) Pulse width limi ted by safe operating area
(1) ISD 10A, di/dt 200A/µs, VDD V(BR)DSS,T j TJMAX.
THERMAL DATA
(*) Limited only by maximum temperature allowed
TO-220
I2PAK
D2PAK TO-220FP
ISOWATT
218
TO-247
Unit
Rthj-case Thermal Resistance Junction-case
Max
1.09
3.6 0.8 °C/W
Rthj-pcb Thermal Resistance Junction-pcb Max
(When mounted on minimum Footprint)
60
°C/W
Rthj-amb Thermal Resistance Junction-ambient
Max
62.5
50 °C/W
Tl Maximum Lead Temperature For
Soldering Purpose
300 °C
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy
(starting Tj =2 5 °C, ID =I AR,V DD =5 0 V)
Max Value
9A
300
Unit
mJ
GATE-SOURCE ZENER DIODE
Symbol
Parameter
BVGSO
Gate-Source Breakdown
Voltage
Test Conditions
Igs=± 1mA (Open Drain)
Min.
30
Typ. Max.
Unit
V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and cost-
effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage
of external components.
2/16

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STP10NK60Z/FP, STB10NK60Z, STB10NK60Z-1, STW10NK60Z, STH10NK60ZFI
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
600
IDSS
Zero Gate Voltage
Drain Current (VGS =0 )
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
IGSS
Gate-body Leakage
Current (VDS =0 )
VGS = ± 20V
±10
VGS(th) Gate Threshold Voltage
VDS =V GS,I D = 100µA
3 3.75 4.5
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 4.5 A
0.65 0.75
DYNAMIC
Symbol
Parameter
gfs (1) Forward Transconductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Coss eq. (3) Equivalent Output
Capacitance
SWITCHING ON
Symbol
Parameter
td(on)
tr
Turn-on Delay Time
Rise Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Test Conditions
VDS =1 5 V, ID = 4.5 A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
VGS =0 V, VDS = 0V to 480V
Test Conditions
VDD = 300 V, ID =4 A
RG = 4.7VGS =1 0 V
(Resistive Load see, Figure 3)
VDD = 480V, ID =8 A,
VGS = 10V
Min.
Typ.
7.8
1370
156
37
90
Typ.
20
20
50
10
25
Max.
Max.
70
SWITCHING OFF
Symbol
Parameter
td(off)
tf
Turn-off Delay Time
Fall Time
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Condition s
VDD = 300 V, ID =4 A
RG =4 .7VGS =1 0 V
(Resistive Load see, Figure 3)
VDD = 480V, ID =8 A,
RG =4 .7Ω, VGS = 10V
(Inductive Load see, Figure 5)
Min.
Typ.
55
30
18
18
36
Max.
Unit
V
µA
µA
µA
V
Unit
S
pF
pF
pF
pF
Unit
ns
ns
nC
nC
nC
Unit
ns
ns
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
10 A
36 A
VSD (1) Forward On Voltage
ISD =1 0 A, VGS =0
1.6 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 8 A, di/dt = 100A/µs
VDD = 40V, Tj = 150°C
(see test circuit, Figure 5)
570 ns
4.3 µC
15 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.
3/16