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GENERAL DESCRIPTION
OB2278 is a highly integrated current mode PWM
control IC optimized for high performance, low
standby power and cost effective offline flyback
converter applications.
PWM switching frequency at normal operation is
externally programmable and trimmed to tight
range. At no load or light load condition, the IC
operates in extended ‘burst mode’ to minimize
switching loss. Lower standby power and higher
conversion efficiency is thus achieved.
VDD low startup current and low operating current
contribute to a reliable power on startup design
with OB2278. A large value resistor could thus be
used in the startup circuit for reduced power loss.
The internal slope compensation improves system
large signal stability and reduces the possible
sub-harmonic oscillation at high PWM duty cycle
output. Leading-edge blanking on current sense
input removes the signal glitch due to snubber
circuit diode reverse recovery and greatly reduces
the external component count and system cost in
the design.
OB2278 offers comprehensive protection
coverage including Cycle-by-Cycle current
limiting(OCP),
VDD
Under
Voltage
Lockout(UVLO),
VDD
Over
Voltage
Protection(OVP), VDD Clamp, Gate Clamp, Over
Load protection(OLP) and Over Temperature
protection (OTP), etc.
Different latch shutdown options are offered on
OB2278 in different device version. T version
supports both OVP and OTP latch shutdown. L
version provides all OVP, OTP and OLP latch
shutdown control.
Excellent EMI performance is achieved with soft
switching control at the totem pole gate drive
output.
OB2278 is offered in SOP-8 and DIP-8 packages.
TYPICAL APPLICATION
OB2278
Current Mode PWM ControllerLatch Shutdown
Product Specification
FEATURES
Power On Soft Start
Extended Burst Mode Control For Improved
Efficiency and Minimum Standby Power
Design
Audio Noise Free Operation
External Programmable PWM Switching
Frequency
Internal Synchronized Slope Compensation
Low VIN/VDD Startup Current(3uA) and Low
Operating Current (2.3mA)
Leading Edge Blanking on Current Sense
Input
Complete Protection Coverage with selective
protections for Latch Shutdown
o VDD Over Voltage Protection(OVP) – Latch
Shutdown
o Over Temperature Protection(OTP) – Latch
Shutdown
o Over Load Protection. (OLP) – Auto
recovery or Latch Shutdown
o VDD Under Voltage Lockout with Hysteresis
(UVLO)
o Gate Output Voltage Clamp (16.5V)
o Built-in OCP Compensation to Achieve
Minimum OPP Variation over Universal AC
Input Range.
APPLICATIONS
Offline AC/DC flyback converter for
Adaptor
Notebook Adaptor
LCD Monitor/TV/PC/Set-Top Box Power
Supplies
Open-frame SMPS
Printer Power
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Datasheet
OB_DOC_DS_2278A2

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OB2278
Current Mode PWM ControllerLatch Shutdown
GENERAL INFORMATION
Pin Configuration
The pin map of OB2278 in DIP8 and SOP8
package is shown as below.
Ordering Information
Part Number
OB2278AP-T
Description
DIP8, tube package, T
version with OVP/OTP latch
OB2278AP-L
OB2278CP-T
DIP8, tube package, L
version with OVP/OTP/OLP
latch
SOP8, tube package, T
version with OVP/OTP latch
OB2278CPA-T
SOP8, taping package, T
version with OVP/OTP latch
OB2278CP-L
SOP8, tube package, L
version with OVP/OTP/OLP
latch
OB2278CPA-L
SOP8, taping package, L
version with OVP/OTP/OLP
latch
Note: All Devices are offered in Pb-free Package if not
otherwise noted.
Package Dissipation Rating
Package
DIP8
SOP8
RθJA (/W)
90
150
Absolute Maximum Ratings
Parameter
VDD Clamp Voltage (Vclamp)
VDD Clamp Continuous
Current
VIN / VDD Input Voltage
FB Input Voltage
Sense Input Voltage
RT Input Voltage
RI Input Voltage
Min/Max Operating Junction
Temperature TJ
Min/Max Storage Temperature
Tstg
Lead Temperature (Soldering,
10 seconds)
Value
35 V
10 mA
-0.3V to Vclamp
-0.3 to 7V
-0.3 to 7V
-0.3 to 7V
-0.3 to 7V
-20 to 150
-55 to 150
260
Note: Stresses beyond those listed under “absolute
maximum ratings” may cause permanent damage to the
device. These are stress ratings only, functional operation of
the device at these or any other conditions beyond those
indicated under “recommended operating conditions” is not
implied. Exposure to absolute maximum-rated conditions for
extended periods may affect device reliability.
OB2278 X X X - X
Current Mode PWM Controller
Package
A:DIP8
C:SOP8
Package Pb-free
P : Lead Free
Packing
Blank : Tube
A : Taping
Version
T : OVP/OTP Latch
L : OVP/OTP/OLP
Latch
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Datasheet
OB_DOC_DS_2278A2

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Marking Information
OB2278
Current Mode PWM ControllerLatch Shutdown
TERMINAL ASSIGNMENTS
Pin Num
1
2
Pin Name
GND
FB
3 VIN
4 RI
5 RT
6 SENSE
7 VDD
8 GATE
I/O Description
P Ground
I
Feedback input pin. PWM duty cycle is determined by voltage level into
this pin and current-sense signal level at Pin 6.
I
Connected through a large value resistor to rectified line input for startup
and line voltage sensing.
I
Internal oscillator frequency setting pin. A resistor connected between RI
and GND sets the PWM frequency.
Dual function pin. Either connected through a NTC resistor to GND for
I over temperature shutdown control or used as latch shutdown control
input.
I
Current sense input pin. Connected to MOSFET current sensing resistor
node.
P DC power supply pin.
O Totem-pole gate drive output for power MOSFET.
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Datasheet
OB_DOC_DS_2278A2

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BLOCK DIAGRAM
OB2278
Current Mode PWM ControllerLatch Shutdown
RECOMMENDED OPERATING CONDITION
Symbol
VDD
TA
Parameter
VDD Supply Voltage
Operating Ambient Temperature
Min
11.5
-20
Max
25
85
Unit
V
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Datasheet
OB_DOC_DS_2278A2

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OB2278
Current Mode PWM ControllerLatch Shutdown
ELECTRICAL CHARACTERISTICS
(TA = 25, RI=100K ohm, VDD=16V, if not otherwise noted)
Symbol
Parameter
Test Conditions
Min Typ Max Unit
Supply Voltage (VDD)
I_VDD_Startup VDD Start up Current
VDD =15V Measure
current into VDD
3 20 uA
I_VDD_Ops
UVLO(Enter)
UVLO(Exit)
Operation Current
VDD Under Voltage
Lockout Enter
VDD Under Voltage
Lockout Exit (Startup)
VFB=3V
2.3 mA
8.8 9.8 10.8 V
15.5 16.5 17.5 V
OVP(Latch)
OVP(De-Latch)
VDD Over Voltage Latch
Trigger
VDD Latch Release
Voltage Threshold
26.5 28
7.5
29.5 V
V
I(Vdd)_latch
VDD bleeding current at
latch shutdown when VDD
= 9V
45 uA
TD_OVP
VDD_Clamp
T_Softstart
VDD OVP Debounce time
VDD Zener Clamp Voltage
Soft Start Time
I(VDD ) = 5 mA
80 uSec
35 V
3 mSec
Feedback Input Section(FB Pin)
AVCS
PWM Input Gain
VFB_Open
VFB Open Voltage
ΔVFB /ΔVcs
2.8 V/V
6.2 V
IFB_Short
FB pin short circuit current
Short FB pin to GND,
measure current
0.75
mA
VTH_0D
Zero Duty Cycle FB
Threshold Voltage
0.95 V
VTH_BM
Burst Mode FB Threshold
Voltage
1.6 V
VTH_PL
Power Limiting
Threshold Voltage
FB
4.4 V
TD_PL
Power limiting Debounce
Time
80 mSec
ZFB_IN
Input Impedance
9.0 Kohm
Current Sense Input(Sense Pin)
T_blanking
Sense Input Leading Edge
Blanking Time
300 nSec
ZSENSE_IN
TD_OC
Sense Input Impedance
Over Current Detection
and Control Delay
CL=1nf at GATE,
30 Kohm
70 nSec
Current Limiting Threshold
VTH_OC_0
at No Compensation
I(VIN) = 0uA
0.85 0.90 0.95 V
VTH_OC_1
Oscillator
FOSC
f_Temp
f_VDD
Current Limiting Threshold
at Compensation
I(VIN) = 150uA
Normal
Frequency
Frequency
Stability
Frequency
Stability
Oscillation
Temperature
Voltage
-20to 100
VDD = 12-28V,
0.80 V
60 65 70 KHZ
3%
3%
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Datasheet
OB_DOC_DS_2278A2