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ESMT
Preliminary
EMP8130
Ultra High-PSRR, Low-Noise, 300mA CMOS
Linear Regulator
General Description
The EMP8130 features ultra-high power supply
rejection ratio, low output voltage noise, low
dropout voltage, low quiescent current and fast
transient response. It guarantees delivery of 300mA
output current and supports preset output voltages
ranging from 0.8V to 4.0V with 0.1V increment.
Applications
g Wireless handsets
g PCMCIA cards
g DSP core power
g Hand-held instruments
g Battery-powered systems
g Portable information appliances
Based on its low quiescent current consumption and
its less than 1uA shutdown mode of logical operation,
the EMP8130 is ideal for battery-powered
applications. The high power supply rejection ratio
of the EMP8130 holds well for low input voltages
typically encountered in battery-operated systems.
The regulator is stable with small ceramic capacitive
loads (1µF typical).
The EMP8130 is available in miniature SOT-23-5
package.
Features
g 300mA guaranteed output current
g 75dB typical PSRR at 1kHz
g 260mV (VOUT=3.3V) typical dropout at 300mA
g 52µA typical quiescent current
g Less than 1µA typical shutdown mode
g Fast line and load transient response
g 1.7V to 5.5V input range
g Auto-discharge during chip disable
g 0.8V to 4.0V output voltage range
g Stable with small ceramic output capacitors
g Fold-back over current protection
g ±1% output voltage tolerance
Typical Application
EMP8130
VIN
1uF
Ceramic
Capacitor
IN OUT
ON/OFF
EN
GND
VOUT
1uF
Ceramic
Capacitor
Elite Semiconductor Memory Technology Inc.
Publication Date: Feb. 2014
Revision: 0.1
1/12

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ESMT
Connection Diagrams
Preliminary
EMP8130
Order information
EMP8130-XXVN05NRR
--------------------------------------------------
XX Output voltage
--------------------------------------------------
VN05
SOT-23-5 Package
--------------------------------------------------
NRR RoHS & Halogen free package
Rating: -40 to 85°C
Package in Tape & Reel
Order, Marking & Packing Information
Package
Vout-A
Product ID.
0.8V
EMP8130-08VN05NRR
1.0V
EMP8130-10VN05NRR
1.2V
EMP8130-12VN05NRR
1.3V
EMP8130-13VN05NRR
SOT-23-5
1.5V
1.8V
EMP8130-15VN05NRR
EMP8130-18VN05NRR
2.5V
EMP8130-25VN05NRR
2.8V
EMP8130-28VN05NRR
3.0V
EMP8130-30VN05NRR
3.3V
EMP8130-33VN05NRR
Marking
Packing
Tape & Reel
3Kpcs
Elite Semiconductor Memory Technology Inc.
Publication Date: Feb. 2014
Revision: 0.1
2/12

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ESMT
Preliminary
EMP8130
Pin Functions
Name
IN
GND
EN
NC
OUT
SOT-23-5
1
2
3
4
5
Function
Supply Voltage Input.
Require a minimum input capacitor of close to 1µF ceramic capacitor to ensure
stability and sufficient decoupling from the ground pin.
Ground Pin.
Enable Input.
Enable the regulator by pulling the EN pin High. To keep the regulator on during
normal operation, connect the EN pin to VIN. The EN pin must not exceed VIN
under all operating conditions.
No Connected.
Regulated Output Voltage Pin.
A small 1µF ceramic capacitor is needed from this pin to ground to assure
stability.
Functional Block Diagram
FIG.1. Functional Block Diagram of EMP8130
Elite Semiconductor Memory Technology Inc.
Publication Date: Feb. 2014
Revision: 0.1
3/12

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ESMT
Preliminary
EMP8130
Absolute Maximum Ratings (Notes 1, 2)
IN, EN, OUT
-0.3V to 6.5V
Power Dissipation
(Note 8)
Storage Temperature Range
-65°C to 150°C
Junction Temperature (TJ)
150°C
Lead Temperature (Soldering, 10 sec.)
ESD Rating
Human Body Model
Machine Model
260°C
2KV
200V
Operating Ratings (Note 1, 2)
Supply Voltage
Operating Temperature Range
1.7V to 5.5V
-40°C to 85°C
Thermal Resistance (θJA , Note 3))
Thermal Resistance (θJC , Note 4))
152°C/W (SOT-23-5)
81°C/W (SOT-23-5)
Electrical Characteristics
Unless otherwise specified, all limits guaranteed for VIN = VOUT +1V (Note 5), VEN=VIN, CIN = COUT = 1µF, TA = 25°C. Boldface
limits apply for the operating temperature extremes: -40°C and 85°C.
Symbol
Parameter
Conditions
VIN
VOUT
ΔVOTL
IOUT
ISC
IQ
ISD
VDO
ΔVOUT
PSRR
en
Input Voltage
Output Voltage
Vout>2.0V, T=25
Output Voltage Tolerance
Vout<=2.0V, T=25
Vout>2V, -40~85C
Vout<=2V, -40~85C
Maximum Output Current Average DC Current Rating
Short Current Limit
Quiescent Current
IOUT = 0mA
Shutdown Supply Current VOUT = 0V, EN = GND
IOUT = 300mA, Vout=0.8V
IOUT = 300mA, Vout=1.2V
Dropout Voltage (Note4)
IOUT = 300mA, Vout=1.5V
IOUT = 300mA, Vout=1.8V
IOUT = 300mA, Vout=2.8V
IOUT = 300mA, Vout=3.3V
Line Regulation
IOUT = 1mA, (VOUT + 1V) VIN 5.5V
Load Regulation
1mA IOUT 300mA
f = 1kHz, Ripple 0.2 Vp-p,
Power supply rejection ratio
Vin=Set Vout +1V, Iout = 30mA
Output Voltage Noise
VOUT=0.8V, IOUT=30mA,
10Hz f 100kHz
VEN EN Input Threshold
IEN EN Input Bias Current
EN=GND or VIN
Typ
Min Max
(Note. 7)
1.7 5.5
0.8 4.0
X0.99
X1.01
-20 +20
X0.97
X1.03
-60 60
300
40
52 75
0.2 1
860
580
440
380
290
260
0.02 0.1
10 30
75
Units
V
V
V
mV
V
mV
mA
mA
µA
µA
mV
%/V
mV
dB
40 µVRMS
1.0
V
0.4
0.1 1 µA
Elite Semiconductor Memory Technology Inc.
Publication Date: Feb. 2014
Revision: 0.1
4/12

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ESMT
Preliminary
EMP8130
Note 1: Absolute Maximum ratings indicate limits beyond which damage may occur. Electrical specifications do not
apply when operating the device outside of its rated operating conditions.
Note 2: All voltages are with respect to the potential at the ground pin.
Note 3: θJA is measured in the natural convection at TA=25on a high effective thermal conductivity test board (2
layers, 2S0P).
Note 4: θJC represents the resistance to the heat flows the chip to package top case.
Note 5: Dropout voltage is measured by reducing VIN until VOUT drops 100mV from its nominal value at VIN -VOUT = 1V.
Note 6: Maximum Power dissipation for the device is calculated using the following equations:
PD
=
TJ(MAX)
θJA
-
TA
Where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the
junction-to-ambient thermal resistance. E.g. for the SOT-23-5 packageθJA = 152°C/W, TJ (MAX) = 150°C and
using TA = 25°C, the maximum power dissipation is found to be 0.82W. The derating factor (-1/θJA) =
-6.6mW/°C, thus below 25°C the power dissipation figure can be increased by 6.6mW per degree, and
similarity decreased by this factor for temperatures above 25°C.
Note 7: Typical values represent the most likely parametric norm.
Elite Semiconductor Memory Technology Inc.
Publication Date: Feb. 2014
Revision: 0.1
5/12