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Preliminary
OP4017B
• Quartz SAW Stabilized Differential Output Technology
• Very Low Jitter Fundamental-Mode Operation at 777.60 MHz
• Voltage Tunable for Phase Locked Loop Applications
• Optical Timing Reference for Forward Error Correction Applications
The OP4017B is a voltage-controlled SAW clock (VCSC) designed for phase-locked loop (PLL) applications
in optical data communications systems. The differential outputs of the OP4017B are generated by high-Q,
fundamental mode quartz surface acoustic wave (SAW) technology. This technique provides very low output
jitter and phase noise, plus excellent immunity to power supply noise. The OP4017B differential outputs
feature ±1% symmetry, and can be DC-configured to drive a wide range of high-speed logic families. The
OP4017B is packaged in a hermetic metal-ceramic LCC.
Absolute Maximum Ratings
Rating
Value
Units
DC Suppy Voltage
0 to 5.5
Vdc
Tune Voltage
0 to 5.5
Vdc
Case Temperature
-55 to 100
°C
777.60 MHz
Optical
Timing Clock
SMC-8
Electrical Characteristics
Characteristic
Operating Frequency Absolute Frequency
Tuning Range
Tuning Voltage
Tuning Linearity
Modulation Bandwidth
Q and Q Output
Voltage into 50 Ω (VSWR 1.2)
Operating Load VSWR
Symmetry
Harmonic Spurious
Nonharmonic Spurious
Phase Noise
@ 100 Hz offset
@ 1 kHz offset
@ 10 kHz offset
Noise Floor
Q and Q Jitter
RMS Jitter
No Noise on VCC
200 mVP-P Noise, from 1 MHz to ½ fO on VCC
Output DC Resistance (between Q & Q)
DC Power Supply
Operating Voltage
Operating Current
Operating Case Temperature
Lid Symbolization (YY=Year, WW=Week)
Sym
fO
VO
VCC
ICC
TC
Notes
1
2
1
1, 8
1,3
1,3
3, 4, 5
3, 4, 6
3, 4, 6, 7
3, 6
3, 6
3, 6
3, 6
3, 4, 6, 7
3, 4, 6, 7
3
1, 3
1, 3
1, 3
1, 3
Minimum
0
0.60
Typical
777.6
±100
±5
50
49
50
3.13
-70
-100
-125
-150
1
12
12
3.3 or 5.0
-40°C
RFM OP4017B YYWW
Maximum
3.3
1.1
2:1
51
-15
-60
5.25
70
+85°C
Units
MHz
ppm
Vdc
%
kHz
VP-P
%
dBc
dBc
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps
psP-P
psP-P
KΩ
Vdc
mA
°C
CAUTION: Electrostatic Sensitive Device. Observe precautions for handling.
COCOM CAUTION: Approval by the U.S. Department of Commerce is required prior to export of this device.
Notes:
1. Unless otherwise noted, all specifications include the combined effects of load VSWR, VCC and TC.
2. Net tuning range after tuning out the effects of initial manufacturing tolerances, VSWR pushing/pulling, VCC, TC and aging.
3. The internal design, manufacturing processes, and specifications of this device are subject to change without notice.
4. Specified only for a balanced load with a VSWR < 1.2 ( 50 ohms each side), and a VCC = 3.0 Vdc.
5. Symmetry is defined as the width in (% of total period) measure at 50% of the peak-to-peak voltage of either output.
6. Jitter and other noise outputs due to power supply noise or mechanical vibration are not included in this specification except where noted.
7. Applies to period jitter of either differential output. Measured with a Tektronix CSA803 signal analyzer with at least 1000 samples.
8. See Figure 4.
9. One or more of the following United States patents apply: 4, 616,197; 4,670,681; 4,760,352.
www.RFM.com E-mail: info@rfm.com
©2008 by RF Monolithics, Inc.
Page 1 of 2
OP4017B - 3/27/08

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SMC-8
8-Terminal Surface Mount Case
ELECTRICAL CONNECTIONS
Terminal
Number
Connection
1 VCC
2 Ground
3 Enable/Disable
4 Q Output
5 Q Output
6
Ground
7
8 Tuning Input
LID Ground
18
27
36
45
TOP VIEW
Typical Printed Circuit Board Land Pattern
A typical land pattern for a circuit board is shown on the right.
Grounding of the metallic center pad is optional.
Dimension
A
B
C
D
E
F
G
H
J
K
L
M
N
mm
MIN MAX
13.46 13.97
9.14
9.66
1.93 Nominal
3.56 Nominal
2.24 Nominal
1.27 Nominal
2.54 Nominal
3.05 Nominal
1.93 Nominal
5.54 Nominal
4.32 Nominal
4.83 Nominal
0.50 Nominal
Inches
MIN MAX
0.530
0.550
0.360
0.380
0.076 Nominal
0.141 Nominal
0.088 Nominal
0.050 Nominal
0.100 Nominal
0.120 Nominal
0.076 Nominal
0.218 Nominal
0.170 Nominal
0.190 Nominal
0.020 Nominal
Typically 0.01" to 0.05" or 0.25 mm to
1.25 mm (8 Places)
(The optimum value of this dimension is
dependent on the PCB assembly process
employed.)
B
A
C
D
E
N (X8)
M
L
K
F (X8)
G (X3)
H (X2)
J
www.RFM.com E-mail: info@rfm.com
©2008 by RF Monolithics, Inc.
Page 2 of 2
OP4017B - 3/27/08