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SEMICONDUCTOR
80C88
March 1997
CMOS 8/16-Bit Microprocessor
Features
Description
• Compatible with NMOS 8088
• Direct Software Compatibility with 80C86, 8086, 8088
• 8-Bit Data Bus Interface; 16-Bit Internal Architecture
• Completely Static CMOS Design
- DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz (80C88)
- DC . . . . . . . . . . . . . . . . . . . . . . . . . . . .8MHz (80C88-2)
• Low Power Operation
- ICCSB . . . . . . . . . . . . . . . . . . . . . . . . 500µA Maximum
- ICCOP . . . . . . . . . . . . . . . . . . . . 10mA/MHz Maximum
• 1 Megabyte of Direct Memory Addressing Capability
The Harris 80C88 high performance 8/16-bit CMOS CPU is
manufactured using a self-aligned silicon gate CMOS pro-
cess (Scaled SAJI IV). Two modes of operation, MINimum
for small systems and MAXimum for larger applications such
as multiprocessing, allow user configuration to achieve the
highest performance level.
Full TTL compatibility (with the exception of CLOCK) and
industry-standard operation allow use of existing NMOS
8088 hardware and Harris CMOS peripherals.
Complete software compatibility with the 80C86, 8086, and
8088 microprocessors allows use of existing software in new
designs.
• 24 Operand Addressing Modes
• Bit, Byte, Word, and Block Move Operations
• 8-Bit and 16-Bit Signed/Unsigned Arithmetic
• Bus-Hold Circuitry Eliminates Pull-up Resistors
• Wide Operating Temperature Ranges
- C80C88 . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to + 70oC
- I80C88 . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC
- M80C88 . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC
Ordering Information
PACKAGE
Plastic DIP
PLCC
CERDIP
SMD#
LCC
SMD#
TEMPERATURE RANGE
0oC to +70oC
-40oC to +85oC
0oC to +70oC
-40oC to +85oC
0oC to +70oC
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
-55oC to +125oC
-55oC to +125oC
5MHz
CP80C88
IP80C88
CS80C88
lS80C88
CD80C88
ID80C88
MD80C88/B
5962-8601601QA
MR80C88/B
5962-8601601XA
8MHz
CP80C88-2
IP80C88-2
CS80C88-2
IS80C88-2
CD80C88-2
ID80C88-2
MD80C88-2/B
-
MR80C88-2/B
-
PKG. NO.
E40.6
E40.6
N44.65
N44.65
F40.6
F40.6
F40.6
F40.6
J44.A
J44.A
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1997
3-176
File Number 2949.1

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Pinouts
80C88
GND
A14
A13
A12
A11
A10
A9
A8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
NMI
INTR
CLK
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
80C88 (DIP)
TOP VIEW
MIN
MODE
40 VCC
39 A15
38 A16/S3
37 A17/S4
36 A18/S5
35 A19/S6
34 SS0
33 MN/MX
32 RD
31 HOLD
30 HLDA
29 WR
28 IO/M
27 DT/R
26 DEN
25 ALE
24 INTA
23 TEST
22 READY
21 RESET
MAX
MODE
(HIGH)
(RQ/GT0)
(RQ/GT1)
(LOCK)
(S2)
(S1)
(S0)
(QS0)
(QS1)
80C88 (PLCC/LCC)
TOP VIEW
MAX MODE
80C88
A10
A9
A8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
MIN MODE
80C88
6 5 4 3 2 1 44 43 42 41 40
A10 7
39
NC
A9 8
38 A19/S6
A8 9
37 SS0
AD7 10
36 MN/MX
AD6 11
35 RD
AD5 12
34 HOLD
AD4 13
33 HLDA
AD3 14
32 WR
AD2 15
31 IO/M
AD1
AD0
16
17
30 DT/R
29 DEN
18 19 20 21 22 23 24 25 26 27 28
MIN MODE
80C88
NC
A19/S6
(HIGH)
MN/MX
RD
RQ/GT0
RQ/GT1
LOCK
S2
S1
S0
MAX MODE
80C88
3-177

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Functional Diagram
EXECUTION UNIT
REGISTER FILE
DATA POINTER
AND
INDEX REGS
(8 WORDS)
80C88
BUS INTERFACE UNIT
RELOCATION
REGISTER FILE
SEGMENT REGISTERS
AND
INSTRUCTION POINTER
(5 WORDS)
16-BIT ALU
FLAGS
BUS
INTERFACE
UNIT
SSO/HIGH
4 A19/S6. . . A16/S3
8 AD7-AD0
8 A8-A15
3 INTA, RD, WR
4 DT/R, DEN, ALE, IO/M
TEST
INTR
NMI
RQ/GT0, 1
HOLD
HLDA
2
4-BYTE
INSTRUCTION
QUEUE
CONTROL AND TIMING
LOCK
2 QS0, QS1
3 S2, S1, S0
CLK
3
RESET READY MN/MX GND
VCC
MEMORY INTERFACE
C-BUS
BUS
INTERFACE
UNIT
B-BUS
ES
CS
SS
DS
IP
INSTRUCTION
STREAM BYTE
QUEUE
A-BUS
EXECUTION UNIT
CONTROL SYSTEM
EXECUTION
UNIT
AH AL
BH BL
CH CL
DH DL
SP
BP
SI
DI
ARITHMETIC/
LOGIC UNIT
FLAGS
3-178