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STW11NK100Z
N-CHANNEL 1000V - 1.1- 8.3A TO-247
Zener-Protected SuperMESH™Power MOSFET
TYPE
VDSS RDS(on)
ID
Pw
STW11NK100Z 1000 V < 1.38 8.3 A 230 W
s TYPICAL RDS(on) = 1.1
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s GATE CHARGE MINIMIZED
s VERY LOW INTRINSIC CAPACITANCES
s VERY GOOD MANUFACTURING
REPEATIBILITY
3
2
1
TO-247
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established strip-
based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmesh™ products.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s IDEAL FOR OFF-LINE POWER SUPPLIES
ORDERING INFORMATION
SALES TYPE
STW11NK100Z
MARKING
W11NK100Z
PACKAGE
TO-247
PACKAGING
TUBE
December 2003
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STW11NK100Z
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 k)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM ( ) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ)
dv/dt (1) Peak Diode Recovery voltage slope
Tj Operating Junction Temperature
Tstg Storage Temperature
( ) Pulse width limited by safe operating area
(1) ISD 8.3A, di/dt 200A/µs, VDD V(BR)DSS, Tj TJMAX.
(*) Limited only by maximum temperature allowed
THERMAL DATA
Rthj-case Thermal Resistance Junction-case Max
Rthj-amb Thermal Resistance Junction-ambient Max
Tl Maximum Lead Temperature For Soldering Purpose
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
GATE-SOURCE ZENER DIODE
Symbol
Parameter
BVGSO
Gate-Source Breakdown
Voltage
Test Conditions
Igs=± 1mA (Open Drain)
Value
1000
1000
± 30
8.3
5.2
33.2
230
1.85
6000
4.5
-55 to 150
Unit
V
V
V
A
A
A
W
W/°C
V
V/ns
°C
0.54
50
300
Max Value
8.3
550
°C/W
°C/W
°C
Unit
A
mJ
Min.
30
Typ.
Max.
Unit
V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
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STW11NK100Z
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source
Breakdown Voltage
ID = 1 mA, VGS = 0
1000
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20V
±10
VGS(th) Gate Threshold Voltage
VDS = VGS, ID = 100 µA
3 3.75 4.5
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 4.15 A
1.1 1.38
DYNAMIC
Symbol
gfs (1)
Ciss
Coss
Crss
Coss eq. (3)
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Equivalent Output
Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
VDS = 15 V, ID = 4.15 A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
VGS = 0V, VDS = 0V to 500V
VDD = 800 V, ID = 8 A
RG = 4.7VGS = 10 V
(Resistive Load see, Figure 3)
VDD = 800V, ID = 8 A,
VGS = 10V
Typ.
9
3500
270
60
170
27
18
98
55
113
18
60
Max.
162
Unit
V
µA
µA
µA
V
Unit
S
pF
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
8.3
33.2
A
A
VSD (1) Forward On Voltage
ISD = 8.3 A, VGS = 0
1.6 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 8 A, di/dt = 100 A/µs
VDD = 80 V, Tj = 25°C
(see test circuit, Figure 5)
560 ns
4.48 µC
16 A
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 8 A, di/dt = 100 A/µs
VDD = 80 V, Tj = 150°C
(see test circuit, Figure 5)
620 ns
4.57 µC
16 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.
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