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DATASHEET
PWM Doubler with Output Monitoring Feature
ISL6617A
The ISL6617A utilizes Intersil’s proprietary Phase Doubler
scheme to modulate two-phase power trains with single PWM
input. It doubles the number of phases that 3.3V multiphase
controllers can support.
The ISL6617A is designed to minimize the number of analog
signals that interface between the controller and drivers in high
phase count scalable applications. The common COMP signal,
which is usually seen in conventional cascaded configurations, is
not required; this improves noise immunity and simplifies the
layout. Furthermore, the ISL6617A provides low part count and
low cost advantage over the conventional cascaded technique.
By cascading the ISL6617A with another ISL6617 or ISL6611A, it
can quadruple the number of phases that 3.3V multiphase
controllers can support.
The ISL6617A also features tri-state input and outputs that
recognize a high-impedance state, working together with Intersil
multiphase PWM controllers and driver stages to prevent
negative transients on the controlled output voltage when
operation is suspended. This feature eliminates the need for the
Schottky diode that may be utilized in a power system to protect
the load from excessive negative output voltage damage.
Applications
• High current low voltage DC/DC converters
• High frequency and high efficiency VRM and VRD
• High phase count and phase shedding applications
• 3.3V PWM input integrated power stage or DrMOS
Features
• Proprietary phase doubler scheme
• Enhanced light to full load efficiency
• Double or quadruple phase count
• Patented current balancing with DCR current sensing and
adjustable gain
• Current monitoring output (IOUT) to simplify system interface
and layout
• Triple-level enable input for mode selection
• Dual PWM output drives for two synchronous rectified bridges
with single PWM input
• Channel synchronization and two interleaving options
• Support 3.3V PWM input
• Support 5V PWM output
• Tri-state PWM input and outputs for output stage shutdown
• Overvoltage protection
• Dual flat no-lead (DFN) package
- Near chip-scale package footprint; improves PCB utilization,
thinner profile
- Pb-free (RoHS compliant)
Related Literature
TB363, “Guidelines for Handling and Processing Moisture
Sensitive Surface Mount Devices (SMDs)”
Phase Doubler Selection Guide
PART
NUMBER
ISL6617
ISL6617A
PWM
INPUT
5.0V
3.3V
PWM
OUTPUT
5.0V
5.0V
INTEGRATED
DRIVER
CASCADED DEVICES
COMPATIBLE CONTROLLERS
N/A 5.0V PWM DrMOS; ISL6336G, ISL6372/3/4/5/6, ISL6364/67/67H;
ISL6617, ISL6611A ISL6388/98 with 5V PWM Option
N/A 5.0V PWM DrMOS; 3.3V PWM Digital Controllers with Phase Doubler Compatibility;
ISL6617, ISL6611A ISL6388/98 with 3.3V PWM Option
ISL6611A
5V
N/A
5.0V Discrete MOSFET; ISL6336G, ISL6372/3/4/5/6, ISL6364/67/67H;
Dual FETS
ISL6388/98 with 5V PWM Option
December 19, 2014
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

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Internal Block Diagram
ISL6617A
VCC
PWMIN
EN_SYNC
GND
10k
5.5k
CONTROL
LOGIC
IOUT
CURRENT
BALANCE BLOCK
CSENA
CSRTNA CHANNEL A
PWMA
PWMB
CSENB
CSRTNB
CHANNEL B
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
ISL6617AFRZ
17AF
-40 to +125
10 Ld 3x3 DFN
L10.3x3
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For information on MSL please see techbrief TB363.
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Pin Configuration
ISL6617A
ISL6617A
(10 LD DFN)
TOP VIEW
CSRTNA 1
CSENA 2
PWMIN 3
CSRTNB 4
CSENB 5
11
GND
10 PWMA
9 VCC
8 IOUT
7 EN_SYNC
6 PWMB
Functional Pin Descriptions
PIN #
1
2
3
4
5
6
7
8
9
10
11
PIN SYMBOL
CSRTNA
CSENA
PWMIN
CSRTNB
CSENB
PWMB
EN_SYNC
IOUT
VCC
PWMA
GND
FUNCTION
Output of the differential amplifier for Channel A. Connect a resistor on this pin to the negative rail of the sensed voltage to
set the current gain.
Input of the differential amplifier for Channel A. Typically, the positive rail of sensed voltage via DCR sensing network
connects to this node.
The PWM input signal (3.3V) triggers the J-K flip flop and alternates its input to Channel A and B. Both channels are
effectively modulated. The PWM signal can enter three distinct states during operation; see “Operation” on page 8 for
further details. Connect this pin to the PWM output of the controller.
Output of the differential amplifier for Channel B. Connect a resistor on this pin to the negative rail of the sensed voltage to
set the current gain.
Input of the differential amplifier for Channel B. Typically, the positive rail of sensed voltage via DCR sensing network
connects to this node.
PWM output of Channel B with 5V PWM tri-state compatibility.
Driver Enable and Mode Selection Input. See “EN_SYNC Operation” on page 8 for more details.
Current monitoring Output. It sources out the average current of both Channel A and B.
Connect this pin to a +5V bias supply. It supplies power to internal analog circuits. Place a high quality low ESR ceramic
capacitor from this pin to GND.
PWM output of Channel A with 5V PWM tri-state compatibility.
Bias and reference ground. All signals are referenced to this node. Place a high quality low ESR ceramic capacitor from this
pin to VCC. Connect this pad to the power ground plane (GND) via thermally enhanced connection.
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ISL6617A
Typical Application (2-Phase Controller for 4-Phase Operation)
+3.3V
VSEN
VCC
VR_RDY
EN
PWM0
CS0
CSRTN0
+5V
+5V
VCC
PWMA
EN_SYNC
+12V
POWER STAGE
VIN
PWM PHASE
GND
CSENA
PWMIN
CSRTNA
CSRTNB
CSENB
ISL6617A
IOUT
PWMB
GND
+12V POWER
STAGE
VIN
PWM PHASE
GND
+VCORE
MAIN
CONTROL
ISL69xxx
PWM1
CS1
CSRTN1
GND
+5V
+5V
VCC
PWMA
EN_SYNC
+12V
POWER STAGE
VIN
PWM PHASE
GND
CSENA
PWMIN
CSRTNA
CSRTNB
CSENB
ISL6617A
IOUT
PWMB
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
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ISL6617A
Typical Application II (2-Phase Controller to 8-Phase Operation)
+3.3V
VSEN
VCC
+5V
+5V
VCC
PWMA
EN_SYNC
CSENA
CSRTNA
+5V
+5V
VCC
PWMA
EN_SYNC
+12V
POWER STAGE
VIN
PWM PHASE
GND
PWMIN
ISENA-
ISENA+
ISENB+
ISENB-
ISL6617
IOUT
PWMB
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
+VCORE
PWM0
CS0
CSRTN0
MAIN
CONTROL
ISL69xxx
PWMIN
ISL6617A
IOUT
CSENB
CSRTNB
PWMB
GND
+5V
+5V
VCC
PWMA
EN_SYNC
CSENA
CSRTNA
+5V
+5V
VCC
PWMA
EN_SYNC
IOUT
PWMIN
ISENA-
ISENA+
ISENB+
ISENB-
ISL6617
PWMB
GND
+12V
POWER STAGE
VIN
PWM PHASE
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
+5V
+5V
VCC
PWMA
EN_SYNC
+12V POWER STAGE
VIN
PWM PHASE
GND
PWMIN
ISENA-
ISENA+
ISENB+
ISENB-
ISL6617
IOUT
PWMB
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
PWM1
CS1
CSRTN1
GND
PWMIN
ISL6617A
IOUT
CSENB
CSRTNB
PWMB
GND
+5V
+5V
VCC
PWMA
EN_SYNC
IOUT
PWMIN
ISENA-
ISENA+
ISENB+
ISENB-
ISL6617
PWMB
GND
+12V
POWER STAGE
VIN
PWM PHASE
GND
+12V
POWER
STAGE
VIN
PWM PHASE
GND
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