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July 2012
FXMAR2104
Dual-Supply, 4-Bit Voltage Translator / Isolator for
Open-Drain and Push-Pull Applications
Features
Bi-Directional Interface between Any Two Levels:
1.65V to 5.5V
Direction Control Not Needed
Internal 10KΩ Pull-Up Resistors
System GPIO Resources Not Required when OE
Tied to VCCA
I2C-Bus® Isolation
A/B Port VOL = 175mV (Typical), VIL = 150mV,
IOL = 6mA
Open-Drain Inputs / Outputs
Works in a Push-Pull Environment
Accommodates Standard-Mode and Fast-Mode
I2C-Bus Devices
Supports I2C Clock Stretching & Multi-Master
Fully Configurable: Inputs and Outputs Track VCC
Non-Preferential Power-Up; Either VCC May Be
Powered-Up First
Outputs Switch to 3-State if Either VCC is at GND
Tolerant Output Enable: 5V
Packaged in 12-Lead Ultrathin MLP
(1.8mm x 1.8mm)
ESD Protection Exceeds:
- 5kV HBM (per JESD22-A114)
- 2kV CDM (per JESD22-C101)
Description
The FXMAR2104 is a 4-bit high-performance,
configurable dual-voltage supply, open-drain translator
for bi-directional voltage translation over a wide range of
input and output voltages levels. The FXMAR2104 also
works in a push-pull environment.
Intended for use as a voltage translator in applications
using the I2C-Bus® interface, the input and output
voltage levels are compatible with I2C device
specification voltage levels. Eight internal 10KΩ pull-up
resistors are integrated.
The device is designed so that the A port tracks the
VCCA level and the B port tracks the VCCB level. This
allows for bi-directional A/B port voltage translation
between any two levels from 1.65V to 5.5V. VCCA can
equal VCCB from 1.65V to 5.5V.
Non-preferential power-up means VCC can be powered-
up first. Internal power-down control circuits place the
device in 3-state if either VCC is removed.
The two ports of the device have automatic direction-
sense capability. Either port may sense an input signal
and transfer it as an output signal to the other port.
Ordering Information
Part Number
Operating
Temperature Range
FXMAR2104UMX
-40 to +85°C
Top
Mark
BY
Package
12-Lead, Ultrathin MLP, 1.8mm x 1.8mm
Packing
Method
5000 Units on
Tape and Reel
© 2011 Fairchild Semiconductor Corporation
FXMAR2104 • Rev. 1.0.1
www.fairchildsemi.com

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Block Diagram
OE
Internal Direction
Generator &
Control
VCCB
Dynamic
Driver (with
Time Out)
10K
VbiasA
A
VCCA
10K
VbiasB
Dynamic Driver
(with Time Out)
Internal Direction
Generator &
Control
Figure 1. Block Diagram, 1 of 4 Channels
B
© 2011 Fairchild Semiconductor Corporation
FXMAR2104 • Rev. 1.0.1
2
www.fairchildsemi.com

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Pin Configuration
Figure 2. UMLP (Top-Through View)
Pin Definitions
Pin #
1
2
3, 4, 5, 6
7
8
9, 10, 11, 12
Name
VCCB
VCCA
A0, A1, A2, A3
GND
OE
B3, B2, B1, B0
Description
B-Side Power Supply
A-Side Power Supply
A-Side Inputs or 3-State Outputs
Ground
Output Enable Input
B-Side Inputs or 3-State Outputs
Truth Table
Control
OE
Outputs
LOW Logic Level
3-State
HIGH Logic Level
Normal Operation
Note:
1. If the OE pin is driven LOW, the FXMAR2104 is disabled and the A0, A1, A2, A3, B0, B1, B2 and B3 pins (including
dynamic drivers) are forced into 3-state. Also, if the OE pin is driven LOW, all eight 10KΩ internal pull-up
resistors are decoupled from their respective VCCs.
© 2011 Fairchild Semiconductor Corporation
FXMAR2104 • Rev. 1.0.1
3
www.fairchildsemi.com

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Absolute Maximum Ratings
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
VCCA, VCCB Supply Voltage
A Port
VIN DC Input Voltage
B Port
Control Input (OE)
VO
IIK
IOK
IOH / IOL
ICC
PD
TSTG
ESD
An Outputs 3-State
Output Voltage(2)
Bn Outputs 3-State
An Outputs Active
Bn Outputs Active
DC Input Diode Current
At VIN < 0V
DC Output Diode Current
At VO < 0V
At VO > VCC
DC Output Source/Sink Current
DC VCC or Ground Current per Supply Pin
Power Dissipation
At 400KHz
Storage Temperature Range
Electrostatic Discharge
Capability
Human Body Model, B-Port
(vs. GND & vs. VCCB)
Human Body Model, All Pins,
JESD22-A114
Charged Device Mode, JESD22-C101
Note:
2. IO absolute maximum rating must be observed.
Min.
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-50
-65
Max.
7.0
7.0
7.0
7.0
7.0
7.0
VCCA + 0.5V
VCCB + 0.5V
-50
-50
+50
+50
±100
0.129
+150
Unit
V
V
mA
mA
mA
mA
mW
°C
8
5 kV
2
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCCA, VCCB Power Supply Operating
VIN Input Voltage
Parameter
A Port
B Port
Control Input (OE)
Min.
1.65
0
0
0
Max.
5.50
5.5
5.5
VCCA
Units
V
V
ΘJA Thermal Resistance
301.5
C°/W
TA Free Air Operating Temperature
Note:
3. All unused I/O pins should be disconnected.
-40 +85
°C
© 2011 Fairchild Semiconductor Corporation
FXMAR2104 • Rev. 1.0.1
4
www.fairchildsemi.com

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Functional Description
Power-Up/Power-Down Sequencing
FXM translators offer an advantage in that either VCC
may be powered up first. This benefit derives from the
chip design. When either VCC is at 0V, outputs are in a
high-impedance state. The control input (OE) is
designed to track the VCCA supply. A pull-down resistor
tying OE to GND should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up/power-down. The size of the pull-
down resistor is based upon the current-sinking
capability of the device driving the OE pin.
The recommended power-up sequence is:
1. Apply power to the first VCC.
2. Apply power to the second VCC.
3. Drive the OE input HIGH to enable the device.
The recommended power-down sequence is:
1. Drive OE input LOW to disable the device.
2. Remove power from either VCC.
3. Remove power from other VCC.
Note:
4. Alternatively, the OE pin can be hardwired to VCCA
to save GPIO pins. If OE is hardwired to VCCA,
either VCC can be powered up or down first.
Application Circuit
Figure 3. Application Circuit
© 2011 Fairchild Semiconductor Corporation
FXMAR2104 • Rev. 1.0.1
5
www.fairchildsemi.com