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Features
Two Alignment-free PLL FM Demodulators, Automatic Lock-in on the Received Sound
Carrier Frequency
Mono and Dual Channel Application
Sound IF Inputs Provided for Ceramic Filters
Automatic Mute for Second Sound Channel (Squelch)
Mute Function for Both Sound Channels
5-V Supply Voltage, Low-power Consumption
Few External Components
Description
The U2860B-M is a dual-channel FM sound demodulator realized with Atmel ’s
advanced bipolar process. All TV FM standards, from 4.5 MHz up to 6.5 MHz
(standard M, B/G, I, D/K) can be processed with high performance. The circuit is
alignment-free and has a minimum number of external components. With 5 V supply
voltage, the U2860B-M is suitable for TV, VCR and multimedia applications.
Dual-Channel
FM Sound
Demodulator for
TV Systems
U2860B-M
Figure 1. Block Diagram
VS
13
Cstab
12 11
Supply
Vin1 1
VCO 1
Loop
filter 1
Mute
3
Mute
VCO
offset
Vin2 14
VCO 1
Loop
filter 2
Squelch
4
Squelch
Squelch (second carrier)
8
7 VAF1
10 VCO offset
Rref
(optional)
6 VAF2
9
Rev. 4794A–TVVCR–02/04

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Pin Configuration
Figure 2. Pinning
Vin1
NC
Vmute
Vsque
NC
VAF2
VAF1
1
2
3
4
5
6
7
14 Vin2
13 VS
12 GND
11 Cstab
10 Rref
9 C9
8 C8
Pin Description
Pin Symbol
1 Vin1
2 NC
3 Vmute
4 Vsque
5 NC
6 VAF2
7 VAF1
8 C8
9 C9
10 Rref
11 Cstab
12 GND
13 VS
14 Vin2
Function
Intercarrier input of sound channel 1 (5.5 MHz)
Not connected
Mute for sound channel 1+2 “on/off”
Automatic mute for 2nd sound channel (squelch) “on/off”
Not connected
Audio output AF2 of sound channel 2
Audio output AF1 of sound channel 1
Decoupling capacitor for sound channel 1
Decoupling capacitor for sound channel 2
VCO offset of the free-running frequency
Internal supply voltage stabilization
Ground
Supply voltage
Intercarrier input of sound channel 2 (5.74 MHz)
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U2860B-M
Circuit Description
Limiter Amplifiers
PLL FM
Demodulators
Audio Amplifiers
Squelch Function
Mute Switch
Internal Voltage
Stabilizer
The U2860B-M includes two identical sound IF channels. Each consists of a limiter
amplifier, PLL FM demodulator and AF amplifier. Additionally, this circuit contains a
squelch function, mute switch and internal voltage regulation.
The intercarrier signals are fed through external ceramic bandpass filters to a 7-stage
limiter amplifier. This guarantees high input sensitivity and excellent AM suppression.
The alignment-free Phase Locked Loop (PLL) demodulator covers a wide frequency
range of 4.5 MHz up to 6.5 MHz with low-noise performance. The linear voltage to
frequency characteristic results in low harmonic distortion. The free-running frequency
of the internal VCO circuit is about 5.5 MHz. For this frequency, the input sensitivity and
VCO locking is optimal. An additional external resistor at pin 10 allows a frequency shift
of ±1 MHz via an internal offset current. With this option, it is possible to shift the opti-
mum conditions to the upper frequency (6.5 MHz) or to the lower frequency (4.5 MHz).
The offset current acts simultaneously on both VCO circuits. If no resistor is connected,
the offset current is disabled.
The demodulated signals are amplified to 500 mVrms with low output impedance at the
audio outputs (pin 6 and pin 7). AC decoupling at pin 8 and pin 9 of the audio amplifiers
leads to high common mode rejection.
For channel 2 the audio output amplifier and VCO2 is muted automatically (squelch)
when the second sound carrier is not present. This avoids a wrong identification for
stereo and dual sound in the stereo decoder. Therefore, with mono sound, there is no
output signal at pin 6. The automatic squelch function can be disabled by switching pin 4
to ground.
Simultaneous muting of both circuits is possible by switching pin 3 to ground.
The internal bandgap reference ensures constant performance independent of supply
voltage and temperature.
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Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Reference point pin 12, unless otherwise specified.
Parameters
Pin Symbol
Value
Unit
Supply voltage
13 VS
Supply current
13 IS
Power dissipation VS = +9 V
P
Output currents
6, 7 Iout
External voltages
1, 14
3, 4
6, 7, 8, 9, 10, 11
Vext
Vext
Vext
Junction temperature
Tj
Storage temperature
Electrostatic handling(1) all pins
Tstg
VESD
Notes: 1. Machine model in accordance with ESD S5.2 standard.
9.0
33
300
±1.5
2.0
VS
4.5 V
+125
-25 to +125
±200
V
mA
mW
mA
V
V
V
°C
°C
V
Thermal Resistance
Parameters
Junction ambient when soldering to PCB
Operating Range
Parameters
Supply voltage range, pin 13
Ambient temperature
Symbol
RthJA
Symbol
VS
Tamb
Value
90
Unit
K/W
Value
4.5 to 9.0
0 to 85
Unit
V
°C
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U2860B-M
Electrical Characteristics
VS = 5 V, Tamb = 25° C, reference point pin , unless otherwise specified
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
DC Supply (Pin 13)
Supply voltage range
Supply current
Intercarrier Input 1 (Pin 1)
VS 4.5 5.0
IS 27
DC input voltage
Input resistance(1)
Input limiting voltage
Intercarrier Input 2, Pin 14
Input signal vin:
f = 5.5 MHz
output signal AF1:
vAF1 = -3 dB
VDC 1.75
Rin 680
vlim
DC input voltage
Input resistance(1)
Input limiting voltage
Input signal for automatic
second sound carrier mute off
(squelch)
Input signal vin:
f = 5.74 MHz
output signal AF2:
vAF2 = -3 dB
Audio output AF2 active
VDC 1.75
Rin 680
vlim
vin
> 0.7
1.0
FM Demodulators, Internal VCO’s (Pin 10)
Free-running frequency
Oscillator drift (free-running) as
function of temperature
T = 55° C
fVCO
fVCO
5.5
500
Oscillator shift (free-running)
as function of supply voltage
4.5 V < VS < 5.5 V
fVCO
200
Adjustment range of
free-running frequencies
By external resistor Rref at
pin 10
fadj
±1
Adjustment resistance for
free-running frequencies
Rref 15 22
FM Demodulators, Internal VCO’s (Pin 10)
Steepness of free-running
frequency adjustment
Resistor Rref at pin 10
S 200
Capture range of PLL’s
Holding range of PLL’s
Audio Outputs, AF1 (Pin 7) and AF2 (Pin 6)
fcap
fhold
±1.4
±2.0
±1.9
±3.0
DC output voltage
VDC
DC output current
Output resistance(1)
IDC
Rout
AC output peak current
iAC
Note: 1. This parameter is given as an application information and not measured during final testing.
2.2
1.0
150
Max.
Unit
9.0 V
33 mA
V
750
150 µV
V
750
150 µV
< 1.5
mV
MHz
kHz
kHz
MHz
30 k
kHz/k
MHz
MHz
-1.3
±1.0
V
mA
mA
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