90S8515.pdf 데이터시트 (총 30 페이지) - 파일 다운로드 90S8515 데이타시트 다운로드

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Features
Utilizes the AVR® RISC Architecture
AVR – High-performance and Low-power RISC Architecture
– 118 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General-purpose Working Registers
– Up to 8 MIPS Throughput at 8 MHz
Data and Nonvolatile Program Memory
– 8K Bytes of In-System Programmable Flash
Endurance: 1,000 Write/Erase Cycles
– 512 Bytes of SRAM
– 512 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
– Programming Lock for Flash Program and EEPROM Data Security
Peripheral Features
– One 8-bit Timer/Counter with Separate Prescaler
– One 16-bit Timer/Counter with Separate Prescaler
Compare, Capture Modes and Dual 8-, 9-, or 10-bit PWM
– On-chip Analog Comparator
– Programmable Watchdog Timer with On-chip Oscillator
– Programmable Serial UART
– Master/Slave SPI Serial Interface
Special Microcontroller Features
– Low-power Idle and Power-down Modes
– External and Internal Interrupt Sources
Specifications
– Low-power, High-speed CMOS Process Technology
– Fully Static Operation
Power Consumption at 4 MHz, 3V, 25°C
– Active: 3.0 mA
– Idle Mode: 1.0 mA
– Power-down Mode: <1 µA
I/O and Packages
– 32 Programmable I/O Lines
– 40-lead PDIP, 44-lead PLCC and TQFP
Operating Voltages
– 2.7 - 6.0V for AT90S8515-4
– 4.0 - 6.0V for AT90S8515-8
Speed Grades
– 0 - 4 MHz for AT90S8515-4
– 0 - 8 MHz for AT90S8515-8
8-bit
Microcontroller
with 8K Bytes
In-System
Programmable
Flash
AT90S8515
Rev. 0841G–09/01
1

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Pin Configurations
2 AT90S8515
0841G–09/01

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Description
Block Diagram
AT90S8515
The AT90S8515 is a low-power CMOS 8-bit microcontroller based on the AVR RISC
architecture. By executing powerful instructions in a single clock cycle, the AT90S8515
achieves throughputs approaching 1 MIPS per MHz, allowing the system designer to
optimize power consumption versus processing speed.
Figure 1. The AT90S8515 Block Diagram
0841G–09/01
The AVR core combines a rich instruction set with 32 general-purpose working regis-
ters. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU),
allowing two independent registers to be accessed in one single instruction executed in
3