MT29F1G08ABAEAWP pdf, MT29F1G08ABAEAWP 데이터시트, MT29F1G08ABAEAWP 데이타시트

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Preliminary‡

1Gb x8, x16: NAND Flash Memory

Features

NAND Flash Memory

MT29F1G08ABAEAWP-IT, MT29F1G08ABAEAWP, MT29F1G08ABAEAH4-IT

MT29F1G08ABAEAH4, MT29F1G08ABBEAH4-IT, MT29F1G08ABBEAH4,

MT29F1G16ABBEAH4-IT, MT29F1G16ABBEAH4, MT29F1G08ABBEAHC-IT,

MT29F1G08ABBEAHC, MT29F1G16ABBEAHC-IT, MT29F1G16ABBEAHC

Features

• Open NAND Flash Interface (ONFI) 1.0-compliant1

• Single-level cell (SLC) technology

• Organization

– Page size x8: 2112 bytes (2048 + 64 bytes)

– Page size x16: 1056 words (1024 + 32 words)

– Block size: 64 pages (128K + 4K bytes)

– Device size: 1Gb: 1024 blocks

• Asynchronous I/O performance

– tRC/tWC: 20ns (3.3V), 25ns (1.8V)

• Array performance

– Read page: 25µs

– Program page: 200µs (TYP, 3.3V and 1.8V)

– Erase block: 700µs (TYP)

• Command set: ONFI NAND Flash Protocol

• Advanced command set

– Program page cache mode

– Read page cache mode

– One-time programmable (OTP) mode

– Read unique ID

– Internal data move

– Block lock (1.8V only)

• Operation status byte provides software method for

detecting

– Operation completion

– Pass/fail condition

– Write-protect status

• Internal data move operations supported within the

device from which data is read

• Ready/busy# (R/B#) signal provides a hardware

method for detecting operation completion

• WP# signal: write protect entire device

• First block (block address 00h) is valid when ship-

ped from factory with ECC. For minimum required

ECC, see Error Management.

• Block 0 requires 1-bit ECC if PROGRAM/ERASE cy-

cles are less than 1000

• RESET (FFh) required as first command after pow-

er-on

• Alternate method of device initialization (Nand_In-

it) after power up3 (contact factory)

• Quality and reliability

– Data retention: 10 years

– Endurance: 100,000 PROGRAM/ERASE cycles

• Operating Voltage Range

– VCC: 2.7–3.6V

– VCC: 1.7–1.95V

• Operating temperature:

– Commercial: 0°C to +70°C

– Industrial (IT): –40ºC to +85ºC

• Package

– 48-pin TSOP type 1, CPL2

– 63-ball VFBGA

Notes:

1. The ONFI 1.0 specification is available at

www.onfi.org.

2. CPL = Center parting line.

3. Available only in the 1.8V VFBGA package.

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m68m_non_ecc.pdf – Rev. E 7/12 EN

1 Micron Technology, Inc. reserves the right to change products or specifications without notice.

‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by

Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications.

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Micron Confidential and Proprietary

Preliminary

1Gb x8, x16: NAND Flash Memory

Features

Part Numbering Information

Micron NAND Flash devices are available in different configurations and densities. Verify valid part numbers by

using Micron’s part catalog search at www.micron.com. To compare features and specifications by device type,

visit www.micron.com/products. Contact the factory for devices not found.

Figure 1: Marketing Part Number Chart

MT 29F 1G 08 A B B E A HC xx xx x ES :E

Micron Technology

Product Family

29F = NAND Flash memory

Density

1G = 1Gb

Device Width

08 = 8-bit

16 = 16-bit

Level

A= SLC

Classification

Mark Die nCE RnB I/O Channels

Operating Voltage Range

A = 3.3V (2.7–3.6V)

B = 1.8V (1.7–1.95V)

Feature Set

E = Feature set E

Design Revision (shrink)

Production Status

Blank = Production

ES = Engineering sample

MS = Mechanical sample

QS = Qualification sample

Reserved for Future Use

Blank

Operating Temperature Range

Blank = Commercial (0°C to +70°C)

IT = Industrial (–40°C to +85°C)

Speed Grade

Blank

Package Code

WP = 48-pin TSOP 1

HC = 63-ball VFBGA (10.5 x 13 x 1.0mm)

H4 = 63-ball VFBGA (9 x 11 x 1.0mm)

Interface

A = Async only

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Preliminary

1Gb x8, x16: NAND Flash Memory

Features

Contents

General Description ......................................................................................................................................... 8

Signal Descriptions and Assignments ................................................................................................................ 8

Signal Assignments ........................................................................................................................................... 9

Package Dimensions ....................................................................................................................................... 12

Architecture ................................................................................................................................................... 15

Device and Array Organization ........................................................................................................................ 16

Asynchronous Interface Bus Operation ........................................................................................................... 18

Asynchronous Enable/Standby ................................................................................................................... 18

Asynchronous Commands .......................................................................................................................... 18

Asynchronous Addresses ............................................................................................................................ 20

Asynchronous Data Input ........................................................................................................................... 21

Asynchronous Data Output ......................................................................................................................... 22

Write Protect# ............................................................................................................................................ 23

Ready/Busy# .............................................................................................................................................. 23

Device Initialization ....................................................................................................................................... 28

Command Definitions .................................................................................................................................... 29

Reset Operations ............................................................................................................................................ 31

RESET (FFh) ............................................................................................................................................... 31

Identification Operations ................................................................................................................................ 32

READ ID (90h) ............................................................................................................................................ 32

READ ID Parameter Tables .............................................................................................................................. 33

READ PARAMETER PAGE (ECh) ...................................................................................................................... 35

Parameter Page Data Structure Tables ............................................................................................................. 36

READ UNIQUE ID (EDh) ................................................................................................................................ 39

Feature Operations ......................................................................................................................................... 40

SET FEATURES (EFh) .................................................................................................................................. 41

GET FEATURES (EEh) ................................................................................................................................. 42

Status Operations ........................................................................................................................................... 45

READ STATUS (70h) ................................................................................................................................... 46

Column Address Operations ........................................................................................................................... 47

RANDOM DATA READ (05h-E0h) ................................................................................................................ 47

RANDOM DATA INPUT (85h) ...................................................................................................................... 48

PROGRAM FOR INTERNAL DATA INPUT (85h) ........................................................................................... 48

Read Operations ............................................................................................................................................. 50

READ MODE (00h) ..................................................................................................................................... 51

READ PAGE (00h-30h) ................................................................................................................................ 51

READ PAGE CACHE SEQUENTIAL (31h) ...................................................................................................... 52

READ PAGE CACHE RANDOM (00h-31h) .................................................................................................... 53

READ PAGE CACHE LAST (3Fh) .................................................................................................................. 53

Program Operations ....................................................................................................................................... 55

PROGRAM PAGE (80h-10h) ......................................................................................................................... 55

PROGRAM PAGE CACHE (80h-15h) ............................................................................................................. 56

Erase Operations ............................................................................................................................................ 58

ERASE BLOCK (60h-D0h) ............................................................................................................................ 58

Internal Data Move Operations ....................................................................................................................... 59

READ FOR INTERNAL DATA MOVE (00h-35h) ............................................................................................. 59

PROGRAM FOR INTERNAL DATA MOVE (85h-10h) ..................................................................................... 61

Block Lock Feature ......................................................................................................................................... 62

WP# and Block Lock ................................................................................................................................... 62

UNLOCK (23h-24h) .................................................................................................................................... 62

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Preliminary

1Gb x8, x16: NAND Flash Memory

Features

LOCK (2Ah) ................................................................................................................................................ 65

LOCK TIGHT (2Ch) ..................................................................................................................................... 66

BLOCK LOCK READ STATUS (7Ah) .............................................................................................................. 67

One-Time Programmable (OTP) Operations .................................................................................................... 69

OTP DATA PROGRAM (80h-10h) ................................................................................................................. 70

RANDOM DATA INPUT (85h) ...................................................................................................................... 71

OTP DATA PROTECT (80h-10) ..................................................................................................................... 72

OTP DATA READ (00h-30h) ......................................................................................................................... 74

Error Management ......................................................................................................................................... 76

Electrical Specifications .................................................................................................................................. 77

Electrical Specifications – AC Characteristics and Operating Conditions ........................................................... 79

Electrical Specifications – DC Characteristics and Operating Conditions ........................................................... 82

Electrical Specifications – Program/Erase Characteristics ................................................................................. 84

Asynchronous Interface Timing Diagrams ....................................................................................................... 85

Revision History ............................................................................................................................................. 95

Rev. E, Preliminary – 7/12 ............................................................................................................................ 95

Rev. D, Preliminary – 2/12 ........................................................................................................................... 95

Rev. C, Preliminary – 2/12 ........................................................................................................................... 95

Rev. B, Preliminary – 11/11 .......................................................................................................................... 95

Rev. A, Preliminary – 08/11 .......................................................................................................................... 95

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1Gb x8, x16: NAND Flash Memory

Features

List of Tables

Table 1: Asynchronous Signal Definitions ......................................................................................................... 8

Table 2: Array Addressing (x8) ........................................................................................................................ 16

Table 3: Array Addressing (x16) ...................................................................................................................... 17

Table 4: Asynchronous Interface Mode Selection ............................................................................................ 18

Table 5: Command Set .................................................................................................................................. 29

Table 6: READ ID Parameters for Address 00h ................................................................................................. 33

Table 7: READ ID Parameters for Address 20h ................................................................................................. 34

Table 8: Parameter Page Data Structure .......................................................................................................... 36

Table 9: Feature Address Definitions .............................................................................................................. 40

Table 10: Feature Address 90h – Array Operation Mode ................................................................................... 41

Table 11: Feature Addresses 01h: Timing Mode ............................................................................................... 43

Table 12: Feature Addresses 80h: Programmable I/O Drive Strength ................................................................ 44

Table 13: Feature Addresses 81h: Programmable R/B# Pull-Down Strength ...................................................... 44

Table 14: Status Register Definition ................................................................................................................ 45

Table 15: Block Lock Address Cycle Assignments ............................................................................................ 64

Table 16: Block Lock Status Register Bit Definitions ........................................................................................ 67

Table 17: Error Management Details .............................................................................................................. 76

Table 18: Absolute Maximum Ratings ............................................................................................................. 77

Table 19: Recommended Operating Conditions .............................................................................................. 77

Table 20: Valid Blocks .................................................................................................................................... 77

Table 21: Capacitance .................................................................................................................................... 78

Table 22: Test Conditions ............................................................................................................................... 78

Table 23: AC Characteristics: Command, Data, and Address Input (3.3V) ......................................................... 79

Table 24: AC Characteristics: Command, Data, and Address Input (1.8V) ......................................................... 79

Table 25: AC Characteristics: Normal Operation (3.3V) ................................................................................... 80

Table 26: AC Characteristics: Normal Operation (1.8V) ................................................................................... 80

Table 27: DC Characteristics and Operating Conditions (3.3V) ........................................................................ 82

Table 28: DC Characteristics and Operating Conditions (1.8V) ........................................................................ 83

Table 29: ProgramErase Characteristics .......................................................................................................... 84

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