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VCXO PLUS AUDIO CLOCK FOR STB
DATASHEET
MK3722
Description
The MK3722 is a low cost, low jitter, high performance
VCXO and PLL clock synthesizer designed to replace
expensive discrete VCXOs and multipliers. The patented
on-chip Voltage Controlled Crystal Oscillator accepts a 0 to
3.3 V input voltage to cause the output clocks to vary by
±115 ppm. Using IDT’s analog/digital Phase-Locked Loop
(PLL) techniques, the device uses an inexpensive 27 MHz
pullable crystal input to produce a reference output and a
selectable audio clock.
IDT manufactures the largest variety of VCXO based timing
devices for all applications. Consult IDT to eliminate
VCXOs, crystals, and oscillators from your board.
The frequency of the on-chip VCXO is adjusted by an
external control voltage connected to VIN. Because VIN is
a high impedance input, it can be driven directly from an
PWM RC integrator circuit.
Features
Packaged in 16-pin TSSOP
Pb (lead) free package
Replaces a VCXO and oscillator
Operating voltage of 3.3V
Provides output of 27 MHz plus audio clock
Uses an inexpensive 27 MHz pullable crystal
On-chip patented VCXO with pull range of 230 ppm
(minimum)
VCXO tuning voltage of 0 to 3.3 V
Advanced, low power, sub-micron CMOS process
Block Diagram
S2:S0
VIN
3
27 MHz
Pullable
Crystal
X1
X2
VDD
3
PLL/Clock
Synthesis
Circuitry
Voltage
Controlled
Crystal
Oscillator
3
GND
PDTS
ACLK
27MHz
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Pin Assignment
X2
X1
VDD
VDD
VIN
GND
GND
PDTS
1
2
3
4
5
6
7
8
16 S1
15 NC
14 VDD
13 S0
12 27M
11 GND
10 ACLK
9 S2
16 Pin 4.40mm body, 0.65mm pitch TSSOP
VCXO AND SYNTHESIZER
Audio Clock Select Table
S2 S1 S0
000
001
010
011
100
101
110
111
ACLK (MHz)
8.192
11.2896
12.288
16.9344
18.432
16.384
22.5792
24.576
Pin Descriptions
Pin
Number
Pin
Name
1 X2
2 X1
3 VDD
4 VDD
5 VIN
6 GND
7 GND
8 PDTS
9 S2
10 ACLK
11 GND
12 27M
13 S0
14 VDD
15 NC
16 S1
Pin
Type
Pin Description
Output Crystal connection. Connect to a 27MHz fundamental mode
pullable crystal.
Input Crystal connection. Connect to a 27MHz fundamental mode
pullable crystal.
Power Connect to +3.3 V.
Power Connect to +3.3 V.
Input Voltage input to VCXO. Zero to 3.3V signal which controls the
VCXO frequency.
Power Connect to ground.
Power Connect to ground.
Power Power Down Tri-state. This pin powers down entire chip and
tri-states the outputs when low. Internal pull-up.
Input Select input S2. Selects ACLK per table above. Internal pull-up.
Output Audio clock output per table above.
Power Connect to ground.
Output 27MHz reference clock output.
Input Select input S0. Selects ACLK per table above. Internal pull-up.
Power Connect to +3.3V.
-- No connect. Do not connect anything to this pin.
Input Select input S1. Selects ACLK per table above. Internal pull-up.
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VCXO AND SYNTHESIZER
External Component Selection
The MK3722 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01µF should be connected
between VDD and GND on pins 3 and 4, pins 6 and 7, and
pins 11 and 14 as close to the MK3722 as possible. For
optimum device performance, the decoupling capacitors
should be mounted on the component side of the PCB.
Avoid the use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB traces between the clock outputs and the
loads are over 1 inch, series termination should be used. To
series terminate a 50trace (a commonly used trace
impedance) place a 33resistor in series with the clock line,
as close to the clock output pin as possible. The nominal
impedance of the clock output is 20.
Quartz Crystal
The MK3722 VCXO function consists of the external crystal
and the integrated VCXO oscillator circuit. To assure the
best system performance (frequency pull range) and
reliability, a crystal device meeting IDT’ recommended
parameters must be used, and the layout guidelines
discussed in the following section must be followed.
See Application Note MAN05 for a full list of crystal
parameters.
The frequency of oscillation of a quartz crystal is determined
by its “cut” and by the load capacitors connected to it. The
MK3722 incorporates on-chip variable load capacitors that
“pull” (change) the frequency of the crystal. The crystal
specified for use with the MK3722 is designed to have zero
frequency error when the total of on-chip + stray
capacitance is 14pF.
The external crystal must be connected as close to the chip
as possible and should be on the same side of the PCB as
the MK3722. There should be no via’s between the crystal
pins and the X1 and X2 device pins. There should be no
signal traces underneath or close to the crystal.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors on the
PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture and
frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these capacitors
can be found in application note MAN05.
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MK3722
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VCXO AND SYNTHESIZER
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK3722. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Soldering Temperature
Rating
7V
-0.5 V to VDD+0.5 V
0 to +70° C
-65 to +150° C
260° C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Reference crystal parameters
Min.
0
+3.15
Typ.
Max.
+70
+3.45
Refer to page 3
Units
°C
V
DC Electrical Characteristics
VDD=3.3 V ±5% , Ambient temperature 0 to +70° C, unless stated otherwise
Parameter
Symbol Conditions
Min.
Operating Voltage
VDD
3.15
Output High Voltage
Output Low Voltage
Output High Voltage (CMOS Level)
Input High Voltage (S1:S0)
Input High Voltage (S2)
Input Low Voltage (S1:S0)
Input Low Voltage (S2)
Operating Supply Current
VOH
VOL
VOH
VIH
VIH
VIL
VIL
IDD
IOH = -12 mA
IOL = 12 mA
IOH = -4 mA
No load, 2
outputs
2.4
VDD-0.4
2.0
2.5
Short Circuit Current
VIN, VCXO Control Voltage
On Chip Pull-up Resistor, inputs
Input Capacitance
Nominal Output Impedance
IOS
VIA
RPU
CIN
ZOUT
S0, S1, S2
S0, S1, S2
0
Typ.
11
±50
150
5
20
Max.
3.45
0.4
0.8
0.5
Units
V
V
V
V
V
V
V
V
mA
mA
3.3 V
k
pF
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VCXO AND SYNTHESIZER
AC Electrical Characteristics
VDD = 3.3 V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Symbol
Conditions
Min. Typ. Max. Units
Crystal Pullability
VCXO Gain
fP 0V< VIN < 3.3 V, Note 1
VIN = VDD/2 + 1 V, Note 1
+ 100
80
ppm
ppm/V
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Maximum Output Jitter,
short term
tOR 0.8 to 2.0 V, CL=15 pF
tOF 2.0 to 0.8 V, CL=15 pF
tD Measured at 1.65 V, CL=15 pF
tJ CL=15 pF
0.75 1.5
0.75 1.5
40 50 60
+150
ns
ns
%
ps
Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
Thermal Characteristics
Parameter
Symbol Conditions
Thermal Resistance Junction to
Ambient
θJA Still air
θJA 1 m/s air flow
θJA 3 m/s air flow
Thermal Resistance Junction to Case θJC
Min.
Typ.
78
70
68
37
Max. Units
° C/W
° C/W
° C/W
° C/W
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