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MB91570 Series
32-bit Microcontroller
MB91F575B/F575BS/F575BH/F575BHS/F575C/
F575CS/F575CH/F575CHS
MB91F577B/F577BS/F577BH/F577BHS/F577CS/
F577CH/F577CHS
MB91F578C(M)/F578CS(M)/F578CH(M)/F578CHS(M)
MB91F579C(M)/F579CS(M)/F579CH(M)/F579CHS(M)
Data Sheet (Full Production)
Publication Number MB91F577_DS705-00009 Revision 3.0 Issue Date June 19, 2015

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DataSheet
2 MB91F577_DS705-00009-3v0-E, June 19, 2015

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MB91570 Series
32-bit Microcontroller
MB91F575B/F575BS/F575BH/F575BHS/F575C/
F575CS/F575CH/F575CHS
MB91F577B/F577BS/F577BH/F577BHS/F577CS/
F577CH/F577CHS
MB91F578C(M)/F578CS(M)/F578CH(M)/F578CHS(M)
MB91F579C(M)/F579CS(M)/F579CH(M)/F579CHS(M)
Data Sheet (Full Production)
DESCRIPTION
This series is Spansion 32-bit microcontroller designed for automotive and industrial control applications. It
contains the FR81S CPU that is compatible with the FR family. The FR81S has a high level performance
among the Spansion FR family by enhancing CPU instruction pipeline and load store processing, and
improving internal bus transfer.
It is best suited for application control for automotive.
Note: FR is a line of products of Spansion Inc.
Spansion provides information facilitating product development via the following website.
The website contains information useful for customers.
http://www.spansion.com/Support/microcontrollers/
Publication Number MB91F577_DS705-00009 Revision 3.0 Issue Date June 19, 2015
This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient
production volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the
valid combinations offered may occur.

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DataSheet
FEATURES
FR81S CPU Core
32-bit RISC, load/store architecture, 5-stage pipeline
Maximum operating frequency: 80 MHz (Source oscillation = 4.0 MHz and 20 multiplied ( PLL clock
multiplication system ))
General-purpose register : 32-bit ×16 sets
16-bit fixed length instructions ( basic instruction ), 1 instruction per cycle
Instructions appropriate to embedded applications
Memory-to-memory transfer instruction
Bit processing instruction
Barrel shift instruction etc.
High-level language support instructions
Function entry/exit instructions
Register content multi-load and store instructions
Bit search instructions
Logical 1 detection, 0 detection, and change-point detection
Branch instructions with delay slot
Decrease overhead during branch process
Register interlock function
Easy assembler writing
Built-in multiplier and instruction level support
Signed 32-bit multiplication : 5 cycles
Signed 16-bit multiplication : 3 cycles
Interrupt ( PC/PS saving )
6 cycles ( 16 priority levels )
The Harvard architecture allows simultaneous execution of program and data access.
Instruction compatibility with the FR family
Built-in memory protection function ( MPU )
Eight protection areas can be specified commonly for instructions and the data.
Control access privilege in both privilege mode and user mode.
Built-in FPU (floating point arithmetic)
IEEE754 compliant
Floating-point register 32-bit × 16 sets
Peripheral Functions
Clock generation (equipped with SSCG function)
Main oscillation (4MHz)
Sub oscillation (32kHz ) or no sub oscillation
PLL multiplication rate : 1 to 20 times
Built-in Program flash memory capacity
MB91F575 : 512 + 64KB
MB91F577 : 1024 + 64KB
MB91F578 : 1536 + 64KB
MB91F579 : 2048 + 64KB
Built-in Data flash memory (WorkFlash) capacity 64KB
Built-in RAM capacity
Main RAM
MB91F575 : 40KB
MB91F577 : 64KB
MB91F578 : 96KB
MB91F579 : 128KB
Backup RAM
MB91F575/7 : 8KB
MB91F578/9 : 16KB
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MB91F577_DS705-00009-3v0-E, June 19, 2015

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DataSheet
General-purpose ports
[LQFP-144]
111 (none sub oscillation ), 109 (with sub oscillation )
Included I2C pseudo open drain ports : 4
P057 : Input only
[LQFP-208]
159 (none sub oscillation ), 157 (with sub oscillation )
Included I2C pseudo open drain ports : 4
P057 : Input only
External bus interface
22-bit address, 16-bit data
23 pins of 9-bit address, 8-bit data, ASX, CS0X, CS1X, RDX, WR0X, and WR1X can select
5V/3.3V by the VCCE power supply
DMA Controller
Up to 16 channels can be started simultaneously.
2 transfer factors ( Internal peripheral request and software )
A/D converter (successive approximation type)
8/10-bit resolution : 40 channels
Conversion time : 3μs
D/A converter (R-2R type)
8-bit resolution : 2 channels
External interrupt input: 16 channels
Level ("H" / "L"), or edge detection ( rising or falling ) enabled
LIN-UART
6 channels, ch.2 to ch.7
Selectable from UART, synchronous mode or LIN-UART mode
LIN protocol Revision 2.1 supported (LIN-UART).
SPI( Serial Peripheral Interface ) supported ( synchronous mode )
Full-duplex double buffering system
LIN synch break detection ( linked to the input capture )
Built-in dedicated baud rate generator
DMA transfer support
Multi-function serial communication (built-in transmission/reception FIFO memory ) : 4 channels
< UART (Asynchronous serial interface) >
Full-duplex double buffering system, 16-byte transmission FIFO memory, 16-byte reception FIFO
memory
Parity or no parity is selectable.
Built-in dedicated baud rate generator
The external clock can be used as the transfer clock
Parity, frame, and overrun error detect functions provided
DMA transfer support
<CSIO (Synchronous serial interface) >
Full-duplex double buffering system, 16-byte transmission FIFO, memory, 16-byte reception FIFO
memory
SPI supported; master and slave systems supported; 5 to 9-bit data length can be set.
Built-in dedicated baud rate generator (Master operation)
The external clock can be entered. (Slave operation)
Overrun error detection function is provided
DMA transfer support
<LIN-UART (Asynchronous Serial Interface for LIN) >
Full-duplex double buffering system, 16-byte transmission FIFO memory, 16-byte reception FIFO
memory
LIN protocol revision 2.1 supported
Master and slave systems supported
Framing error and overrun error detection
LIN synch break generation and detection; LIN synch delimiter generation
June 19, 2015, MB91F577_DS705-00009-3v0-E
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