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www.fairchildsemi.com
FSDH0265RN, FSDM0265RN
Green Mode Fairchild Power Switch (FPSTM)
Features
• Internal Avalanche Rugged Sense FET
• Consumes only 0.65W at 240VAC & 0.3W load with
Advanced Burst-Mode Operation
• Frequency Modulation for EMI Reduction
• Precision Fixed Operating Frequency
• Internal Start-up Circuit
• Pulse-by-Pulse Current Limiting
• Abnormal Over Current Protection (AOCP)
• Over Voltage Protection (OVP)
• Over Load Protection (OLP)
• Internal Thermal Shutdown Function (TSD)
• Auto-Restart Mode
• Under Voltage Lockout (UVLO)
• Low Operating Current (3mA)
• Adjustable Peak Current Limit
• Built-in Soft Start
Applications
• SMPS for VCR, SVR, STB, DVD & DVCD Player
• SMPS for Printer, Facsimile & Scanner
• Adapter for Camcorder
Related Application Notes
• AN-4137, 4141, 4147(Flyback) / AN-4134(Forward)
Description
Each product in the FSDx0265RN (x for M, H) family con-
sists of an integrated Pulse Width Modulator (PWM) and
Sense FET, and is specifically designed for high perfor-
mance off-line Switch Mode Power Supplies (SMPS) with
minimal external components. Both devices are integrated
high voltage power switching regulators which combine an
avalanche rugged Sense FET with a current mode PWM
control block. The integrated PWM controller features
include: a fixed oscillator with frequency modulation for
reduced EMI, Under Voltage Lock Out (UVLO) protection,
Leading Edge Blanking (LEB), an optimized gate turn-on/
turn-off driver, Thermal Shut Down (TSD) protection,
Abnormal Over Current Protection (AOCP) and temperature
compensated precision current sources for loop compensa-
tion and fault protection circuitry. When compared to a dis-
crete MOSFET and controller or RCC switching converter
solution, the FSDx0265RN devices reduce total component
count, design size, weight while increasing efficiency, pro-
ductivity and system reliability. Both devices provide a basic
platform that is well suited for the design of cost-effective
flyback converters.
FPSTM is a trademark of Fairchild Semiconductor Corporation.
©2005 Fairchild Semiconductor Corporation
OUTPUT POWER TABLE
230VAC ±15%(3)
85-265VAC
PRODUCT
Adapt- Open Adapt- Open
er(1) Frame(2) er(1) Frame(2)
FSDL321
11W
17W
8W
12W
FSDH321
11W
17W
8W
12W
FSDL0165RN 13W
23W
11W
17W
FSDM0265RN 16W
27W
13W
20W
FSDH0265RN 16W
27W
13W
20W
FSDL0365RN 19W
30W
16W
24W
FSDM0365RN 19W
30W
16W
24W
FSDL321L
11W
17W
8W
12W
FSDH321L
11W
17W
8W
12W
FSDL0165RL 13W
23W
11W
17W
FSDM0265RL 16W
27W
13W
20W
FSDH0265RL 16W
27W
13W
20W
FSDL0365RL 19W
30W
16W
24W
FSDM0365RL 19W
30W
16W
24W
Notes:
1. Typical continuous power in a non-ventilated enclosed
adapter with sufficient drain pattern as a heat sinker, at
50°C ambient.
2. Maximum practical continuous power in an open frame
design with sufficient drain pattern as a heat sinker, at 50°C
ambient.
3. 230 VAC or 100/115 VAC with doubler.
Typical Circuit
AC
IN
Vstr Drain
Ipk
PWM
Vfb Vcc Source
DC
OUT
Figure 1. Typical Flyback Application
Rev.1.0.8

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FSDH0265RN, FSDM0265RN
Internal Block Diagram
Vfb
3
Ipk
4
Vcc
2
VBURH
+
-
VBURL/VBURH
Vcc Vcc
8V/12V
Vcc
IBUR(pk)
IDELAY
IFB Normal
2.5R
Soft
Start
R
Burst
Vstr
5
ICH
Vcc good
Freq.
Modulation
Vref
Internal
Bias
OSC
PWM
SQ
RQ
Gate
driver
LEB
VSD
Vcc
Vovp
TSD
Vcc good
SQ
RQ
AOCP
Vocp
Drain
6,7,8
1 GND
Figure 2. Functional Block Diagram of FSDx0265RN
2

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Pin Definitions
FSDH0265RN, FSDM0265RN
Pin Number
1
2
3
4
5
6, 7, 8
Pin Name
GND
Vcc
Vfb
Ipk
Vstr
Drain
Pin Function Description
Sense FET source terminal on primary side and internal control ground.
Positive supply voltage input. Although connected to an auxiliary transform-
er winding, current is supplied from pin 5 (Vstr) via an internal switch during
startup (see Internal Block Diagram section). It is not until Vcc reaches the
UVLO upper threshold (12V) that the internal start-up switch opens and de-
vice power is supplied via the auxiliary transformer winding.
The feedback voltage pin is the non-inverting input to the PWM comparator.
It has a 0.9mA current source connected internally while a capacitor and op-
tocoupler are typically connected externally. A feedback voltage of 6V trig-
gers over load protection (OLP). There is a time delay while charging
external capacitor Cfb from 3V to 6V using an internal 5uA current source.
This time delay prevents false triggering under transient conditions, but still
allows the protection mechanism to operate under true overload conditions.
This pin adjusts the peak current limit of the Sense FET. The feedback
0.9mA current source is diverted to the parallel combination of an internal
2.8kresistor and any external resistor to GND on this pin to determine the
peak current limit. If this pin is tied to Vcc or left floating, the typical peak cur-
rent limit will be 1.5A.
This pin connects directly to the rectified AC line voltage source. At start up
the internal switch supplies internal bias and charges an external storage
capacitor placed between the Vcc pin and ground. Once the Vcc reaches
12V, the internal switch is opened.
The drain pins are designed to connect directly to the primary lead of the
transformer and are capable of switching a maximum of 650V. Minimizing
the length of the trace connecting these pins to the transformer will decrease
leakage inductance.
Pin Configuration
8DIP
8LSOP
GND 1
Vcc 2
Vfb 3
Ipk 4
8 Drain
7 Drain
6 Drain
5 Vstr
Figure 3. Pin Configuration (Top View)
3