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N0412N
N-CHANNEL MOSFET FOR SWITCHING
Preliminary Data Sheet
R07DS0554EJ0100
Rev.1.00
Nov 07, 2011
Description
The N0412N is N-channel MOS Field Effect Transistor designed for high current switching applications.
Features
Low on-state resistance
RDS (on) = 3.7 mΩ MAX. (VGS = 10 V, ID = 50 A)
Low input capacitance
Ciss = 5550 pF TYP. (VDS = 25 V, VGS = 0 V)
High current
ID(DC) = ±100 A
RoHS Compliant
Ordering Information
Part No.
N0412N-S19-AY 1
Lead Plating
Pure Sn (Tin)
Packing
Tube
50 p/tube
Note: 1. Pb-free (This product does not contain Pb in the external electrode.)
Package
TO-220
1.9 g TYP.
Absolute Maximum Ratings (TA = 25°C, all terminals are connected)
Item
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
Drain Current (pulse) 1
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C)
Channel Temperature
Storage Temperature
Single Avalanche Current 2
Single Avalanche Energy 2
Symbol
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
PT2
Tch
Tstg
IAS
EAS
Ratings
40
±20
±100
±400
119
1.5
150
55 to +150
55
300
Unit
V
V
A
A
W
W
°C
°C
A
mJ
Thermal Resistance
Channel to Case (Drain) Thermal Resistance Rth(ch-C)
Channel to Ambient Thermal Resistance 2
Rth(ch-A)
1.05
83.3
°C/W
°C/W
Notes: 1. PW 10 μs, Duty Cycle 1%
2. Starting Tch = 25°C, RG = 25 Ω, VDD = 25 V, VGS = 20 0 V, L = 100 μH
R07DS0554EJ0100 Rev.1.00
Nov 07, 2011
Page 1 of 6

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N0412N
Chapter Title
Electrical Characteristics (TA = 25°C, all terminals are connected)
Item
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Cut-off Voltage
Forward Transfer Admittance 1
Drain to Source On-state
Resistance 1
Symbol
IDSS
IGSS
VGS(off)
| yfs |
RDS(on)
MIN.
2.0
26
TYP.
2.7
MAX.
1
±100
4.0
3.7
Unit
μA
nA
V
S
mΩ
Test Conditions
VDS = 40 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 50 A
VGS = 10 V, ID = 50 A
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage 1
Reverse Recovery Time
Reverse Recovery Charge
Note: 1. Pulsed
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QG
QGS
QGD
VF(S-D)
trr
Qrr
5550
580
320
29.0
15.0
64.0
13.0
100
26
32
40
44
1.5
pF VDS = 25 V,
pF VGS = 0 V,
pF f = 1 MHz
ns VDD = 20 V, ID = 50 A,
ns VGS = 10 V,
ns RG = 0 Ω
ns
nC VDD = 32 V,
nC VGS = 10 V,
nC ID = 100 A
V IF = 100 A, VGS = 0 V
ns IF = 50 A, VGS = 0 V,
nC di/dt = 100 A/μ s
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
PG.
VGS = 20 0 V
50 Ω
L
VDD
BVDSS
ID
VDD
IAS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
RG
PG.
VGS
0
τ
τ = 1 μs
Duty Cycle 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
Wave Form
0
td(on)
VGS 90%
90%
10% 10%
tr td(off) tf
ton toff
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
R07DS0554EJ0100 Rev.1.00
Nov 07, 2011
Page 2 of 6

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N0412N
Chapter Title
Typical Characteristics (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS SAFE
OPERATING AREA
140
120
100
80
60
40
20
0
0 25 50 75 100 125 150 175
TC - Case Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
1000
RDS(on) Limited
100
10
PW = 300 µs
1 ms
10 ms
Power Dissipation Limited
1
TC = 25°C
0.1
0.1 1
10 100
VDS - Drain to Source Voltage - V
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
140
120
100
80
60
40
20
0
0 25 50 75 100 125 150 175
TC - Case Temperature - °C
1000
100
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
Single pulse
Rth(ch-A) = 83.3°C/W
10
Rth(ch-C) = 1.05°C/W
1
0.1
0.01
0.1 m
1m
10 m
100 m
1
10
PW - Pulse Width - s
100 1000
R07DS0554EJ0100 Rev.1.00
Nov 07, 2011
Page 3 of 6