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A-GA10JT12
Normally – OFF Silicon Carbide
Super Junction Transistor
VDS
I
D
RDS(ON)
= 1200 V
= 7A
= 220 mȍ
Features
225 oC maximum operating temperature
Best in class temperature independent switching
and blocking performance
Lowest VDS(ON) as compared to any other SiC switch
Suitable for connecting an anti-parallel diode
Gate oxide free SiC switch
Positive temperature coefficient for easy paralleling
Low gate charge
Low intrinsic capacitance
Advantages
Low switching losses
Higher efficiency
Package
D
G
S
Applications
Ideal for Aerospace and Defense Applications
Down Hole Oil Drilling, Geothermal Instrumentation
Hybrid Electric Vehicles (HEV)
Solar Inverters
Switched-Mode Power Supply (SMPS)
Power Factor Correction (PFC)
Induction Heating
Uninterruptible Power Supply (UPS)
Motor Drives
Maximum Ratings, at Tj = 175 °C, unless otherwise specified
Parameter
Drain – Source Voltage
DC-Drain Current
Gate Peak Current
Power dissipation
Operating and storage temperature
Symbol
VDS
IDM
IGM
Ptot
Tj, Tstg
Conditions
TC ” 140 °C
TC = 25 °C
Values
1200
7
1.5
159
-55 to 175
Unit
V
A
A
W
°C
Electrical Characteristics, at Tj = 175 °C, unless otherwise specified
Parameter
Drain – Source On resistance
Drain leakage current
Symbol
RDS(ON)
IDSS
Conditions
IF = 7 A, Tj = 25 °C
IF = 7 A, Tj = 175 °C
VR = 1200 V, Tj = 25 °C
VR = 1200 V, Tj = 175 °C
Thermal Characteristics
Thermal resistance, junction - case
RthJC
min.
Values
typ.
220
390
0.1
0.5
max.
Unit
mȍ
μA
0.95
°C/W
January 2011
Preliminary Datasheet
http://www.genesicsemi.com
Page 1 of 3

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A-GA10JT12
Figure 1: Typical Output Characteristics at 25 oC
Figure 2: Typical Output Characteristics at 125 oC
Figure 3: Typical Output Characteristics at 175 oC
Figure 4: Typical Drain Source On-resistance
Figure 5: Typical Blocking Characteristics
January 2011
Figure 6: Typical Gate Source I-V Characteristics
Preliminary Datasheet
http://www.genesicsemi.com
Page 2 of 3

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A-GA10JT12
Figure 7: Typical C-V Characteristics
Date
2011/01/19
Revision History
Revision
Comments
Preliminary product released for sampling. This device is
1
fast-evolving with a lower targeted Gate Current
requirement. Device performance is not guaranteed to match
this datasheet.
Supersedes
Published by
GeneSiC Semiconductor, Inc.
43670 Trade Center Place Suite 155
Dulles, VA 20166
GeneSiC Semiconductor, Inc. reserves right to make changes to the product specifications and data in this document without notice.
GeneSiC disclaims all and any warranty and liability arising out of use or application of any product. No license, express or implied to any
intellectual property rights is granted by this document.
Unless otherwise expressly indicated, GeneSiC products are not designed, tested or authorized for use in life-saving, medical, aircraft
navigation, communication, air traffic control and weapons systems, nor in applications where their failure may result in death, personal injury
and/or property damage.
January 2011
Preliminary Datasheet
http://www.genesicsemi.com
Page 3 of 3