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Datasheet
RX130 Group
Renesas MCUs
32-MHz, 32-bit RX MCUs, 50 DMIPS, up to 128-KB flash memory,
R01DS0273EJ0100
Rev.1.00
Oct 30, 2015
up to 36 pins capacitive touch sensing unit, up to 6 comms channels, 12-bit A/D, D/A, RTC,
IEC60730 compliance, 1.8-V to 5.5-V single supply
Features
32-bit RX CPU core
Max. operating frequency: 32 MHz
Capable of 50 DMIPS in operation at 32 MHz
Accumulator handles 64-bit results (for a single instruction) from
32-bit × 32-bit operations
Multiplication and division unit handles 32-bit × 32-bit operations
(multiplication instructions take one CPU clock cycle)
Fast interrupt
CISC Harvard architecture with 5-stage pipeline
Variable-length instructions, ultra-compact code
On-chip debugging circuit
Low power design and architecture
Operation from a single 1.8-V to 5.5-V supply
Three low power consumption modes
Low power timer (LPT) that operates during the software standby state
Supply current
High-speed operating mode: 96 A/MHz
Supply current in software standby mode: 0.37 A
Recovery time from software standby mode: 4.8 s
On-chip flash memory for code, no wait states
Operation at 32 MHz, read cycle of 31.25 ns
No wait states for reading at full CPU speed
Programmable at 1.8 V
For instructions and operands
On-chip data flash memory
8 Kbytes (1,000,000 program/erase cycles (typ.))
BGO (Background Operation)
On-chip SRAM, no wait states
10- to 16-Kbyte size capacities
DTC
Four transfer modes
Transfer can be set for each interrupt source.
ELC
Module operation can be initiated by event signals without using
interrupts.
Linked operation between modules is possible while the CPU is sleeping.
Reset and supply management
Eight types of reset, including the power-on reset (POR)
Low voltage detection (LVD) with voltage settings
Clock functions
External clock input frequency: Up to 20 MHz
Main clock oscillator frequency: 1 to 20 MHz
Sub clock oscillator frequency: 32.768 kHz
PLL circuit input: 4 MHz to 8 MHz
Low-speed on-chip oscillator: 4 MHz
High-speed on-chip oscillator: 32 MHz ± 1 %
IWDT-dedicated on-chip oscillator: 15 kHz
Generate a 32.768 kHz clock for the real-time clock
On-chip clock frequency accuracy measurement circuit (CAC)
Realtime clock
Adjustment functions (30 seconds, leap year, and error)
Calendar count mode or binary count mode selectable
Independent watchdog timer
15-kHz on-chip oscillator produces a dedicated clock signal to drive
IWDT operation.
Useful functions for IEC60730 compliance
Self-diagnostic and disconnection-detection assistance functions for
the A/D converter, clock frequency accuracy measurement circuit,
independent watchdog timer, RAM test assistance functions using the
DOC, etc.
PLQP0080KB-B 12 × 12mm, 0.5mm pitch
PLQP0064GA-A 14 × 14mm, 0.8mm pitch
PLQP0064KB-C 10 × 10mm, 0.5mm pitch
PLQP0048KB-B 7 × 7mm, 0.5mm pitch
PWQN0048KB-A 7 × 7mm, 0.5mm pitch
MPC
Input/output functions selectable from multiple pins
Up to 6 communication functions
SCI with many useful functions (up to 4 channels)
Asynchronous mode (Fine adjustable baud rate: 0 to 255/255), clock
synchronous mode, smart card interface mode
I2C bus interface: Transfer at up to 400 kbps, capable of SMBus
operation (one channel)
RSPI (one channel): Transfer at up to 16 Mbps
Up to 12 extended-function timersMPC
16-bit MTU: input capture, output compare, complementary PWM
output, phase counting mode (six channels)
8-bit TMR (four channels)
16-bit compare-match timers (two channels)
12-bit A/D converter
Capable of conversion within 1.4 μs
17 channels
Sampling time can be set for each channel
Conversion results compare features
Self-diagnostic function and analog input disconnection detection
assistance function
Double trigger (data duplication) function for motor control
D/A converter
Two channels
Capacitive touch sensing unit
Self-capacitance method: A single pin configures a single key,
supporting up to 36 keys
Mutual capacitance method: Matrix configuration with 36pins, supporting
up to 324 keys
Comparator B
Two channels
General I/O ports
5-V tolerant, open drain, input pull-up, switching of driving capacity
Temperature sensor
Unique ID
32-byte ID code for the MCU
Operating temperature range
 40 to +85C
 40 to +105C
Applications
General industrial and consumer equipment
R01DS0273EJ0100 Rev.1.00
Oct 30, 2015
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RX130 Group
1. Overview
1. Overview
1.1 Outline of Specifications
Table 1.1 lists the specifications, and Table 1.2 gives a comparison of the functions of the products in different
packages.
Table 1.1 is for products with the greatest number of functions, so the number of peripheral modules and channels will
differ in accordance with the package type. For details, see Table 1.2, Comparison of Functions for Different
Packages in the RX130 Group.
Table 1.1
Outline of Specifications (1/3)
Classification Module/Function
Description
CPU
CPU
Maximum operating frequency: 32 MHz
32-bit RX CPU
Minimum instruction execution time: One instruction per clock cycle
Address space: 4-Gbyte linear
Register set
General purpose: Sixteen 32-bit registers
Control: Eight 32-bit registers
Accumulator: One 64-bit registers
Basic instructions: 73 (variable-length instruction format)
DSP instructions: 9
Addressing modes: 10
Data arrangement
Instructions: Little endian
Data: Selectable as little endian or big endian
On-chip 32-bit multiplier: 32-bit × 32-bit 64-bit
On-chip divider: 32-bit ÷ 32-bit 32 bits
Barrel shifter: 32 bits
Memory
ROM
Capacity: 64 K/128 Kbytes
No-wait memory access
Programming/erasing method:
Serial programming (asynchronous serial communication), self-programming
RAM
Capacity: 10 K/16 Kbytes
No-wait memory access
E2 DataFlash
Capacity: 8 Kbytes
Number of erase/write cycles: 1,000,000 (typ)
MCU operating mode
Single-chip mode
Clock
Clock generation circuit
Main clock oscillator, sub-clock oscillator, low-speed on-chip oscillator, high-speed on-chip oscillator,
PLL frequency synthesizer, and IWDT-dedicated on-chip oscillator
Oscillation stop detection: Available
Clock frequency accuracy measurement circuit (CAC)
Independent settings for the system clock (ICLK), peripheral module clock (PCLK), and FlashIF clock
(FCLK)
The CPU and system sections such as other bus masters run in synchronization with the system
clock (ICLK): 32 MHz (at max.)
Peripheral modules run in synchronization with the PCLKB: 32 MHz (at max.)
The flash peripheral circuit runs in synchronization with the FCLK: 32 MHz (at max.)
The ICLK frequency can only be set to FCLK, PCLKB, or PCLKD multiplied by n (n: 1,2,4,8,16,32,64)
Resets
RES# pin reset, power-on reset, voltage monitoring reset, independent watchdog timer reset, and
software reset
Voltage detection Voltage detection circuit
(LVDAb)
When the voltage on VCC falls below the voltage detection level, an internal reset or internal interrupt
is generated.
Voltage detection circuit 0 is capable of selecting the detection voltage from 4 levels
Voltage detection circuit 1 is capable of selecting the detection voltage from 14 levels
Voltage detection circuit 2 is capable of selecting the detection voltage from 4 levels
Low power
consumption
Low power consumption
functions
Module stop function
Three low power consumption modes
Sleep mode, deep sleep mode, and software standby mode
Function for lower operating Operating power control modes
power consumption
High-speed operating mode, middle-speed operating mode, and low-speed operating mode
Interrupt
Interrupt controller (ICUb)
Interrupt vectors: 101
External interrupts: 9 (NMI, IRQ0 to IRQ7 pins)
Non-maskable interrupts: 5 (The NMI pin, oscillation stop detection interrupt, voltage monitoring 1
interrupt, voltage monitoring 2 interrupt, and IWDT interrupt)
16 levels specifiable for the order of priority
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RX130 Group
1. Overview
Table 1.1
Outline of Specifications (2/3)
Classification
DMA
Module/Function
Data transfer controller
(DTCa)
I/O ports
General I/O ports
Event link controller (ELC)
Multi-function pin controller (MPC)
Timers
Multi-function timer pulse
unit 2 (MTU2a)
Port output enable 2
(POE2a)
Compare match timer
(CMT)
Independent watchdog
timer (IWDTa)
Realtime clock (RTCc)
Low power timer (LPT)
8-bit timer (TMR)
Communication
functions
Serial communications
interfaces (SCIg, SCIh)
I2C bus interface (RIICa)
Description
Transfer modes: Normal transfer, repeat transfer, and block transfer
Activation sources: Interrupts
Chain transfer function
80-pin /64-pin /48-pin
I/O: 68/52/38
Input: 1/1/1
Pull-up resistors: 68/52/38
Open-drain outputs: 47/35/26
5-V tolerance: 4/2/2
Event signals of 47 types can be directly connected to the module
Operations of timer modules are selectable at event input
Capable of event link operation for port B
Capable of selecting the input/output function from multiple pins
(16 bits × 6 channels) × 1 unit
Up to 16 pulse-input/output lines and three pulse-input lines are available based on the six 16-bit
timer channels
Select from among eight or seven counter-input clock signals for each channel (PCLK/1, PCLK/4,
PCLK/16, PCLK/64, PCLK/256, PCLK/1024, MTCLKA, MTCLKB, MTCLKC, MTCLKD) other than
channel 5, for which only four signals are available.
Input capture function
21 output compare/input capture registers
Pulse output mode
Complementary PWM output mode
Reset synchronous PWM mode
Phase-counting mode
Capable of generating conversion start triggers for the A/D converter
Controls the high-impedance state of the MTU’s waveform output pins
(16 bits × 2 channels) × 1 unit
Select from among four clock signals (PCLK/8, PCLK/32, PCLK/128, PCLK/512)
14 bits × 1 channel
Count clock: Dedicated low-speed on-chip oscillator for the IWDT
Frequency divided by 1, 16, 32, 64, 128, or 256
Clock source: Sub-clock
Calendar count mode or binary count mode selectable
Interrupts: Alarm interrupt, periodic interrupt, and carry interrupt
16 bits × 1 channel
Clock source: Sub-clock, Dedicated low-speed on-chip oscillator for the IWDT
Frequency divided by 2, 4, 8, 16, or 32
(8 bits × 2 channels) × 2 units
Seven internal clocks (PCLK/1, PCLK/2, PCLK/8, PCLK/32, PCLK/64, PCLK/1024, and PCLK/8192)
and an external clock can be selected
Pulse output and PWM output with any duty cycle are available
Two channels can be cascaded and used as a 16-bit timer
4 channels (channel 1, 5, 6: SCIg, channel 12: SCIh)
SCIg
Serial communications modes: Asynchronous, clock synchronous, and smart-card interface
On-chip baud rate generator allows selection of the desired bit rate
Choice of LSB-first or MSB-first transfer
Average transfer rate clock can be input from TMR timers for SCI5, SCI6, and SCI12
Start-bit detection: Level or edge detection is selectable.
Simple I2C
Simple SPI
9-bit transfer mode
Bit rate modulation
Event linking by the ELC (only on channel 5)
SCIh (The following functions are added to SCIg)
Supports the serial communications protocol, which contains the start frame and information frame
Supports the LIN format
1 channel
Communications formats: I2C bus format/SMBus format
Master mode or slave mode selectable
Supports fast mode
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RX130 Group
1. Overview
Table 1.1
Outline of Specifications (3/3)
Classification
Communication
functions
Module/Function
Serial peripheral interface
(RSPIa)
12-bit A/D converter (S12ADE)
Temperature sensor (TEMPSA)
D/A converter (DA)
CRC calculator (CRC)
Comparator B (CMPBa)
Capacitive touch sensing unit (CTSUa)
Data operation circuit (DOC)
Unique ID
Power supply voltages/Operating frequencies
Supply current
Operating temperature range
Packages
On-chip debugging system
Description
1 channel
Transfer facility
Using the MOSI (master out, slave in), MISO (master in, slave out), SSL (slave select), and RSPCK
(RSPI clock) signals enables serial transfer through SPI operation (four lines) or
clock-synchronous operation (three lines)
Capable of handling serial transfer as a master or slave
Data formats
Choice of LSB-first or MSB-first transfer
The number of bits in each transfer can be changed to 8, 9, 10, 11, 12, 13, 14, 15, 16, 20, 24, or
32 bits.
128-bit buffers for transmission and reception
Up to four frames can be transmitted or received in a single transfer operation (with each frame
having up to 32 bits)
Double buffers for both transmission and reception
12 bits (17 channels × 1 unit)
12-bit resolution
Minimum conversion time: 1.4 µs per channel when the ADCLK is operating at 32 MHz
Operating modes
Scan mode (single scan mode, continuous scan mode, and group scan mode)
Group A priority control (only for group scan mode)
Sampling variable
Sampling time can be set up for each channel.
Self-diagnostic function
Double trigger mode (A/D conversion data duplicated)
Detection of analog input disconnection
Conversion results compare features
A/D conversion start conditions
A software trigger, a trigger from a timer (MTU), an external trigger signal, or ELC
Event linking by the ELC
1 channel
The voltage output from the temperature sensor is converted into a digital value by the 12-bit A/D
converter.
2 channels
8-bit resolution
Output voltage: 0V to AVCC0
CRC code generation for arbitrary amounts of data in 8-bit units
Select any of three generating polynomials:
X8 + X2 + X + 1, X16 + X15 + X2 + 1, or X16 + X12 + X5 + 1
Generation of CRC codes for use with LSB-first or MSB-first communications is selectable.
2 channels
Function to compare the reference voltage and the analog input voltage
Window comparator operation or standard comparator operation is selectable
Detection pin: 36 channels
Comparison, addition, and subtraction of 16-bit data
32-byte ID code for the MCU
VCC = 1.8 to 2.4 V: 8 MHz, VCC = 2.4 to 2.7 V: 16 MHz, VCC = 2.7 to 5.5 V: 32 MHz
3.1mA@32MHz
D version: 40 to +85°C, G version: 40 to +105°C
80-pin LFQFP (PLQP0080KB-B) 12 × 12 mm, 0.5 mm pitch
64-pin LFQFP (PLQP0064KB-C) 10 × 10 mm, 0.5 mm pitch
64-pin LQFP (PLQP0064GA-A) 14 × 14 mm, 0.8 mm pitch
48-pin LFQFP (PLQP0048KB-B) 7 × 7 mm, 0.5 mm pitch
48-pin HWQFN (PWQN0048KB-A) 7 × 7 mm, 0.5 mm pitch
E1 emulator (FINE interface)
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RX130 Group
1. Overview
Table 1.2
Comparison of Functions for Different Packages in the RX130 Group
Module/Functions
Interrupts
External interrupts
DMA
Data transfer controller
Timers
Multi-function timer pulse unit 2
Port output enable 2
8-bit timer
Compare match timer
Low power timer
Realtime clock
Independent watchdog timer
Communication Serial communications
functions
interfaces (SCIg)
Serial communications
interfaces (SCIh)
I2C bus interface
Serial peripheral interface
Capacitive touch sensing unit
12-bit A/D converter
Temperature sensor
D/A converter
CRC calculator
Event link controller
Comparator B
Packages
RX130 Group
80 Pins
NMI,
IRQ0 to IRQ7
36 channels
17 channels
80-pin LFQFP
(0.5mm)
64 Pins
NMI,
IRQ0 to IRQ2, IRQ4 to IRQ7
Available
6 channels (MTU0 to MTU5)
POE0# to POE3#, POE8#
2 channels× 2 units
2 channels× 1 unit
1 channel
Available
Available
3 channels (SCI1, 5, 6)
1 channel (SCI12)
2 channels
1 channel
1 channel
32 channels
14 channels
Available
Available
Available
2 channels
64-pin LQFP
(0.8mm)
64-pin LFQFP
(0.5mm)
48 Pins
NMI,
IRQ0, IRQ1, IRQ4 to IRQ7
Not supported
24 channels
10 channels
Not supported
48-pin LFQFP
(0.5mm)
48-pin HWQFN
(0.5mm)
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