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CS2844, CS3844, CS2845,
CS3845
Current Mode PWM
Control Circuit with
50% Max Duty Cycle
The CS3844/45 provides all the necessary features to implement
off–line fixed frequency current–mode control with a minimum
number of external components.
The CS3844 family incorporates a new precision
temperature–controlled oscillator to minimize variations in frequency.
An internal toggle flip–flop, which blanks the output every other clock
cycle, limits the duty–cycle range to less than 50%. An undervoltage
lockout ensures that VREF is stabilized before the output stage is
enabled. In the CS2844/CS3844 turn on occurs at 16 V and turn off at
10 V. In the CS2845/CS3845 turn on is at 8.4 V and turn off at 7.6 V.
Other features include low start–up current, pulse–by–pulse current
limiting, and a high–current totem pole output for driving capacitive
loads, such as gate of a power MOSFET. The output is low in the off
state, consistent with N–channel devices.
Features
Optimized for Off–Line Control
Temp. Compensated Oscillator
50% Max Duty–Cycle Clamp
VREF Stabilized Before Output Stage Is Enabled
Low Start–Up Current
Pulse–By–Pulse Current Limiting
Improved Undervoltage Lockout
Double Pulse Suppression
1.0% Trimmed Bandgap Reference
High Current Totem Pole Output
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MARKING
DIAGRAMS
8
8
1
8
1
14
1
16
1
DIP–8
N SUFFIX
CASE 626
SO–8
D SUFFIX
CASE 751
CSx84yN
AWL
YYWW
1
8
384yD
ALYW
SO–14
D SUFFIX
CASE 751A
1
14
CSx84yD14
AWLYWW
1
16
SO–16L
DW SUFFIX
CASE 751G
CSx84yDW
AWLYYWW
1
x = 2 or 3
y = 4 or 5
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2001
June, 2001 – Rev. 3
1
Publication Order Number:
CS2844/D

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CS2844, CS3844, CS2845, CS3845
DIP–8 & SO–8
1
COMP
VFB
Sense
OSC
8
VREF
VCC
VOUT
GND
PIN CONNECTIONS
SO–14
1
COMP
NC
14
VREF
NC
VFB
NC
Sense
NC
VCC
VCC Pwr
VOUT
GND
OSC
Pwr GND
1
NC
NC
COMP
VFB
Sense
OSC
NC
NC
SO–16L
16
NC
VREF
VCC
VCC Pwr
VOUT
GND
Pwr GND
NC
VCC
GND
VFB
COMP
OSC
VCC Undervoltage Lockout
34 V
16 V/10 V
(8.4 V/7.6 V)
Set/ 5.0 V
Reset Reference
Error
Amplifier
2.50 V
Oscillator
R
VREF
Undervoltage
Lockout
R
Toggle
Flip–Flop
Internal
Bias
NOR
Sense
2R S
R
R
1.0 V
Current
PWM
Latch
Sensing
Comparator
( ) Indicates CS2845/3845
Figure 1. Block Diagram
VCC Pwr
VREF
VOUT
Pwr GND
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CS2844, CS3844, CS2845, CS3845
MAXIMUM RATINGS*
Rating
Supply Voltage (ICC < 30 mA)
Supply Voltage (Low Impedance Source)
Output Current
Output Energy (Capacitive Load)
Analog Inputs (VFB, Sense)
Error Amp Output Sink Current
Package Thermal Resistance, PDIP–8
Junction–to–Case, RθJC
Junction–to–Ambient, RθJA
Package Thermal Resistance, SO–8
Junction–to–Case, RθJC
Junction–to–Ambient, RθJA
Package Thermal Resistance, SO–14
Junction–to–Case, RθJC
Junction–to–Ambient, RθJA
Package Thermal Resistance, SO–16L
Junction–to–Case, RθJC
Junction–to–Ambient, RθJA
Lead Temperature Soldering:
Wave Solder (through hole styles only) (Note 1)
Reflow (SMD styles only) (Note 2)
1. 10 second maximum.
2. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
Value
Self Limiting
30
±1.0
5.0
–0.3 to + 5.5
10
52
100
45
165
30
125
23
105
260 peak
230 peak
Unit
V
A
µJ
V
mA
°CW
°CW
°CW
°CW
°CW
°CW
°CW
°CW
°C
°C
ELECTRICAL CHARACTERISTICS (–25° ≤ TA 85° for CS2844/2845, 0° ≤ TA 70° for CS3844/CS3845.
VCC = 15 V*; RT = 10 k, CT = 3.3 nF for sawtooth mode; unless otherwise stated.)
CS2844/CS2845
CS3844/CS3845
Characteristic
Reference Section
Test Conditions
Min Typ Max Min Typ Max
Output Voltage
Line Regulation
Load Regulation
Temperature Stability
TJ = 25°C, IREF = 1.0 mA
12 VCC 25 V
1.0 IREF 20 mA
Note 3.
4.95 5.00 5.05 4.90 5.00 5.10
– 6.0 20 – 6.0 20
– 6.0 25 – 6.0 25
– 0.2 0.4 – 0.2 0.4
Total Output Variation
Line, Load, Temperature. Note 3.
4.90 – 5.10 4.82 – 5.18
Output Noise Voltage
Long Term Stability
Output Short Circuit
Oscillator Section
10 Hz f 10 kHz, TJ = 25°C. Note 3.
TA = 125°C, 1000 Hrs. Note 3.
TA = 25°C
– 50 –
– 50 –
– 5.0 25 – 5.0 25
–30 –100 –180 –30 –100 –180
Initial Accuracy
Sawtooth Mode, TJ = 25°C
47 52 57 47 52 57
Voltage Stability
12 VCC 25 V
– 0.2 1.0 – 0.2 1.0
Temperature Stability
Sawtooth Mode TMIN TA TMAX. Note 3. – 5.0 –
– 5.0 –
Amplitude
VOSC (peak to peak)
– 1.7 –
3. These parameters, although guaranteed, are not 100% tested in production.
*Adjust VCC above the start threshold before setting at 15 V.
– 1.7 –
Unit
V
mV
mV
mV/°C
V
µV
mV
mA
kHz
%
%
V
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CS2844, CS3844, CS2845, CS3845
ELECTRICAL CHARACTERISTICS (continued) (–25° ≤ TA 85° for CS2844/2845, 0° ≤ TA 70° for CS3844/CS3845.
VCC = 15 V*; RT = 10 k, CT = 3.3 nF for sawtooth mode; unless otherwise stated.)
CS2842A/CS2843A CS3842A/CS3843A
Characteristic
Error Amp Section
Test Conditions
Min Typ Max Min Typ Max
Input Voltage
Input Bias Current
AVOL
Unity Gain Bandwidth
VCOMP = 2.5 V
VFB = 0
2.0 VOUT 4.0 V
Note 4.
2.45 2.50 2.55 2.42 2.50 2.58
– –0.3 –1.0 – –0.3 –2.0
65 90 – 65 90 –
0.7 1.0 – 0.7 1.0 –
PSRR
Output Sink Current
Output Source Current
VOUT High
VOUT Low
Current Sense Section
12 VCC 25 V
VFB = 2.7 V, VCOMP = 1.1 V
VFB = 2.3 V, VCOMP = 5.0 V
VFB = 2.3 V, RL = 15 kto GND
VFB = 2.7 V, RL = 15 kto VREF
60 70 – 60 70 –
2.0 6.0 – 2.0 6.0 –
–0.5 –0.8 – –0.5 –0.8 –
5.0 6.0 – 5.0 6.0 –
– 0.7 1.1 – 0.7 1.1
Gain
Notes 5 & 6.
2.85 3.00 3.15 2.85 3.00 3.15
Maximum Input Signal
PSRR
Input Bias Current
Delay to Output
Output Section
VCOMP = 5.0 V. Note 5.
12 VCC 25 V. Note 5.
VSENSE = 0
TJ = 25°C. Note 4.
0.9 1.0 1.1 0.9 1.0 1.1
– 70 –
– 70
– –2.0 –10 – –2.0 –10
– 150 300 – 150 300
Output Low Level
ISINK = 20 mA
ISINK = 200 mA
– 0.1 0.4 – 0.1 0.4
– 1.5 2.2 – 1.5 2.2
Output High Level
Rise Time
Fall Time
Total Standby Current
ISOURCE = 20 mA
ISOURCE = 200 mA
TJ = 25°C, CL = 1.0 nF. Note 4.
TJ = 25°C, CL = 1.0 nF. Note 4.
13 13.5
12 13.5
13 13.5
12 13.5
50 150
50 150
50 150
50 150
Startup Current
– – 0.5 1.0 – 0.5 1.0
Operating Supply Current
VCC Zener Voltage
PWM Section
VFB = VSENSE = 0 V,
RT = 10 k, CT = 3.3 nF
ICC = 25 mA
– 11 17 – 11 17
– 34 –
– 34
Maximum Duty Cycle
– 46 48 50 46 48 50
Minimum Duty Cycle
– ––0––0
4. These parameters, although guaranteed, are not 100% tested in production.
5. Parameters measured at trip point of latch with VFB = 0.
6. Gain defined as: A = VCOMP/VSENSE; 0 VSENSE 0.8 V.
*Adjust VCC above the start threshold before setting at 15 V.
Unit
V
µA
dB
MHz
dB
mA
mA
V
V
V/V
V
dB
µA
ns
V
V
V
V
ns
ns
mA
mA
V
%
%
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CS2844, CS3844, CS2845, CS3845
ELECTRICAL CHARACTERISTICS (continued) (–25° ≤ TA 85° for CS2844/2845, 0° ≤ TA 70° for CS3844/CS3845.
VCC = 15 V*; RT = 10 k, CT = 3.3 nF for sawtooth mode; unless otherwise stated.)
CS2844
CS3844
CS2845/CS3845
Characteristic
Test Conditions
Undervoltage Lockout Section
Start Threshold
Min Typ Max Min Typ Max Min Typ Max
15 16 17 14.5 16 17.5 7.8 8.4 9.0
Min. Operating Voltage After Turn On
9.0 10 11 8.5 10 11.5 7.0 7.6 8.2
*Adjust VCC above the start threshold before setting at 15 V.
Unit
V
V
PACKAGE PIN DESCRIPTION
Package Pin Number
DIP–8 & SO–8 SO–14
Symbol
1 13
2 34
3 55
4 76
5 9 11
– 8 10
6 10 12
– 11 13
7 12 14
8 14 15
– 2, 4, 6, 13 1, 2, 7, 8,
9, 16
Symbol
COMP
VFB
Sense
OSC
GND
Pwr GND
VOUT
VCC Pwr
VCC
VREF
NC
Description
Error amp output, used to compensate error amplifier.
Error amp inverting input.
Noninverting input to Current Sense Comparator.
Oscillator timing network with capacitor to ground, resistor to VREF.
Ground.
Output driver ground.
Output drive pin.
Output driver positive supply.
Positive power supply.
Output of 5.0 V internal reference.
No connection.
4.7 k
1.0 k
ERROR AMP
ADJUST
4.7 k
2N2222
100 k
5.0 k
Sense
ADJUST
RT
COMP
VFB
Sense
OSC
VREF
VCC
0.1 µF
VOUT
GND
A
1.0 k
1.0 W
0.1 µF
VREF
VCC
VOUT
CT
Figure 2. Test Circuit Open Loop Laboratory Test Fixture
GND
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