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CS3524A
Voltage Mode
PWM Control Circuit with
200 mA Output Drivers
The CS3524A PWM control circuit retains the same versatile
architecture of the industry standard CS3524 (SG3524) while adding
substantial improvements.
The CS3524 is pincompatible with “nonA” versions, and in most
applications can be directly interchanged. The CS3524A, however,
eliminates many of the design restrictions which had previously
required additional external circuitry.
The CS3524A includes a precision 5.0 V reference trimmed to ±1%
accuracy (eliminating the need for potentiometer adjustments), an
error amplifier with an output voltage swing extending to 5.0 V, and a
current sense amplifier useful in either the ground or power supply
output lines. The uncommitted 60 V, 200 mA NPN output pair greatly
enhances the output drive capability.
The CS3524A features an undervoltage lockout circuit which
disables all internal circuitry (except the reference) until the input
voltage has risen to 8.0 V. This holds standby current low until
turnon, and greatly simplifies the design of low power, offline
supplies. The turnon circuit has approximately 600 mV of hysteresis
for jitter free activation.
Other improvements include a PWM latch that insures freedom
from multiple pulsing within a period, even in noisy environments;
logic to eliminate double pulsing on a single output, a 200 ns external
shutdown capability, and automatic thermal protection from excessive
chip temperature. The oscillator circuit is usable to 500 kHz and is
easier to synchronize with an external clock pulse.
Features
Precision Reference Internally Trimmed to ±1%
Current Limit
Undervoltage Lockout
StartUp Supply Current < 4.0 mA
Output to 200 mA
60 V Output Capability
Wide CommonMode Input Range for Error and Current Limit
Amplifiers
PWM Latch Insures Single Pulse per Period
Double Pulse Suppression
200 ns Shutdown
Guaranteed Frequency
Thermal Shutdown
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16
1
DIP16
N SUFFIX
CASE 648
MARKING
DIAGRAMS
16
CS3524A
AWLYYWW
1
16
1
SO16L
DW SUFFIX
CASE 751G
16
CS3524A
AWLYYWW
1
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN CONNECTIONS
1
EA
EA+
SYNC
ISENSE+
ISENSE
RT
CT
GND
VREF
VIN
EB
VOUTB
VOUTA
EA
SHUTDOWN
COMP
ORDERING INFORMATION
Device
Package
Shipping
CS3524AGN16
DIP16 25 Units/Rail
CS3524AGDW16
CS3524AGDWR16
SO16L 46 Units/Rail
SO16L 1000 Tape & Reel
© Semiconductor Components Industries, LLC, 2006
July, 2006 Rev. 4
1
Publication Order Number:
CS3524A/D

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CS3524A
VIN
SYNC
RT
CT
COMP
EA
EA+
ISENSE+
ISENSE
OSC
UV
Sense
CLOCK
5 V Reference
Regulator
Power to
Internal
Circuitry
Flip
T Flop
RAMP
VIN
+EA
200 mV VIN
CL
+
COMP
S
S
R
PWM
Latch
1 kΩ
10 kΩ
VREF
VOUTA
EA
VOUTB
EB
SHUTDOWN
GND
Figure 1. Block Diagram
ABSOLUTE MAXIMUM RATINGS*
Rating
Supply Voltage (VIN)
Collector Supply Voltage (VCC)
Output Current (Each Output)
Reference Output Current
Oscillator Charging Current
Power Dissipation at TA = 25°C
Power Dissipation at TJ = +25°C
Derate for Case Temperature above +25°C
Storage Temperature Range
Lead Temperature Soldering
Wave Solder (through hole styles only) Note 1
Reflow (SMD styles only) Note 2
1. 10 seconds max.
2. 60 seconds max above 183°C
*The maximum package power dissipation must be observed.
Value
40
60
200
50
5.0
1000
2000
16
65 to +150
260 peak
230 peak
Unit
V
V
mA
mA
mA
mW
mW
mW/°C
°C
°C
°C
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CS3524A
ELECTRICAL CHARACTERISTICS (0°C TA +70°C, VIN = VCC = 20 V; unless otherwise specified.)
Characteristic
Test Conditions
Min Typ
TurnOn Characteristics
Input Voltage
Operating Range after TurnOn
8.0
TurnOn Threshold
5.5 7.5
TurnOn Current
Operating Current
TurnOn Hysteresis (Note 3)
VIN TurnOn 100 mV
VIN = 8.0 to 40 V
2.5
5.0
0.6
Reference Section
Output Voltage
Line Regulation
Load Regulation
Temperature Stability (Note 3)
TA = 25°C
VIN = 10 to 40 V
IL = 0 to 20 mA
Over Operating Range
4.9 5.0
10
20
20
Short Circuit Current
Output Noise Voltage (Note 3)
Long Term Stability (Note 3)
Oscillator Section
Initial Accuracy
Temperature Stability (Note 3)
VREF = 0, TA = 25°C
10 Hz f 10 kHz, TA = 25°C
TA = 125°C, 1000 Hrs.
RT = 2700 W, CT = 0.01 mF; unless otherwise specified
TA = 25°C
39
Over Operating Temperature Range
80
40
20
43
1.0
Minimum Frequency
Maximum Frequency
Output Amplitude (Note 3)
Output Pulse Width (Note 3)
Ramp Peak
RT = 150 kΩ, CT = 0.1 μF
RT = 2.0 kΩ, CT = 470 pF
TA = 25°C
TA = 25°C
−−
500
3.5
0.5
3.3 3.5
Ramp Valley
0.7 0.9
Error Amplifier Section
Input Offset Voltage
VCM = 2.5 V; unless otherwise specified
2.0
Input Bias Current
− − 1.0
Input Offset Current
− − 0.5
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Output Swing
VCM = 1.5 to 5.5 V
VIN = 10 to 40 V
Minimum Total Range
60 75
50 60
0.5
Open Loop Voltage Gain
GainBandwidth (Note 3)
Current Limit Amplifier
Input Offset Voltage
Input Offset Voltage
ΔVOUT = 1.0 to 4.0 V, RL 10 MΩ
TA = 25°C, AV = 0 dB
VSENSE = VO; unless otherwise specified
TA = 25°C, EA Set for Max. Output
Over Operating Temperature Range
60
180
170
80
3.0
200
Input Bias Current
− − −1.0
Common Mode Rejection Ratio
VSENSE = 0 to 15 V
50 60
Power Supply Rejection Ratio
VIN = 10 to 40 V
50 60
3. These parameters are guaranteed by design but not 100% tested in production.
Max Unit
40 V
8.5 V
4.0 mA
10 mA
V
5.2 V
30 mV
50 mA
50 mV
100 mA
μVRMS
50 mV
47 kHz
2.0 %
120 Hz
kHz
V
μs
3.7 V
1.0 V
10 mV
10 μA
1.0 μA
dB
dB
5.0 V
dB
MHz
220 mV
230 mV
10 μA
dB
dB
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CS3524A
ELECTRICAL CHARACTERISTICS (continued) (0°C TA +70°C, VIN = VCC = 20 V; unless otherwise specified.)
Characteristic
Test Conditions
Min Typ Max
Current Limit Amplifier (continued)
Output Swing
VSENSE = VO; unless otherwise specified
Minimum Total Range
0.5
5.0
Open Loop Voltage Gain
Delay Time (Note 4)
Output Section (Each Output)
ΔVOUT = 1.0 to 4.0 V, RL 10 MΩ
ΔVIN = 300 mV
70 80
300
Collector Emitter Voltage
IC = 100 μA
Collector Leakage Current
VCE = 50 V
Saturation
IC = 20 mA
IC = 200 mA
Emitter Output Voltage
IE = 50 mA
Rise Time (Note 4)
TA = 25°C, R = 2.0 kΩ
Fall Time (Note 4)
TA = 25°C, R = 2.0 kΩ
Comparator Delay (Note 4)
TA = 25°C, VCOMP to VOUT
Shutdown Delay (Note 4)
TA = 25°C, VSHUT to VOUT
Shutdown Threshold
TA = 25°C, RC = 2.0 kΩ
Thermal Shutdown (Note 4)
4. These parameters are guaranteed by design but not 100% tested in production.
60 80
0.1 20
0.2 0.4
1.0 2.2
17 18
200
100
300
200
0.5 0.7 1.0
165
Unit
V
dB
ns
V
μA
V
V
V
ns
ns
ns
ns
V
°C
TYPICAL PERFORMANCE CHARACTERISTICS
80 RF =
RF = 1 M Ω
60 RF = 300 kΩ
RF = 100 kΩ
40 RF = 30 kΩ
VIN = 20 V
TA = 25°C
20 RF is impedance to ground.
Values below 30 kΩ will
0
begin to limit the maximum
dutycycle.
100 1 k 10 k 100 k
Frequency (Hz)
1M
Figure 2. Error Amplifier Voltage Gain vs.
Frequency Over RF
50
VIN = 20 V
40
RT = 2700 Ω
TA = 25°C
30
CT = 10 μF
20
CT = 1 μF
10
00 1 2 3 4
Input Voltage VIN
Figure 3. Duty Cycle vs. Input Voltage
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CS3524A
10
9
8 TA = 55°C
7 TA = 25°C
6 TA = 125°C
5
4
3
2
1
Note: Outputs off. RT =
0 0 10 20 30 40 50
Supply Voltage VIN (V)
Figure 4. Quiescent Supply Current vs. Supply
Voltage Over Temperature
20 Output at
15 VOA or VOB
10
5 VIN = 20 V
0
RL = 2 kΩ
TA = 25°C
5
4
3
Input at VOB
2
1
0
Note: Minimum input pulse width to latch is 200 ns.
0123
Delay Time (μs)
Figure 5. Shutdown Delay from PWM Comparator
1M
100 k
1
2
3
VIN = 20 V
TA = 25°C
4
10 k 5
1. CT = 1.0 nF
1 k 2. CT = 3.0 nF
3. CT = 10 nF
4. CT = 30 nF
100 5. CT = 100 nF
12
5
f
[
1.15
RTCT
10 20
50 100
Timing Resistor, RT (kΩ)
Figure 6. Oscillator Frequency vs. Timing
Components Resistor Over Timing Capacitance
10
VIN = 20 V
5.0
RT = 2700 Ω
TA = 25°C
2.0
1.0
0.5
0.2 Note: Dead time = osc output
pulse width plus output delay
0.11 2
5 10 20
50 100
Timing Capacitor, CT (nF)
Figure 7. Output Dead Time vs. Timing Capacitor
Value
Output at COMP
6
5
4
3
2
Overdrive
1255000%%%%
1
0
0.2
Input at ISENSE+
VIN = 20 V, TA = 25°C
0.1
EA+ = VREF
ISENSE= GND
0
012 34
Delay Time (μs)
Figure 8. Current Limit Amplifier Delay
20
15 VIN = 20 V
10
RL = 2.0 kΩ
TA = 25°C
5 Output at
0 VOA or VOB
1.0
0.5 Input at
Shutdown
0
Note: Minimum input pulse
width to latch is 200 ns.
01 2 3
Delay Time (μs)
Figure 9. TurnOff Delay from Shutdown
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