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®
Data Sheet
X9015
Low Noise, Low Power, Volatile
August 31, 2006
FN8157.5
Single Digitally Controlled (XDCP™)
Potentiometer
The Intersil X9015 is a 32 tap potentiometer that is volatile.
The device consists of a string of 31 resistors that can be
programmed to connect the RW/VW wiper output with any of
the nodes between the connecting resistors. The connection
point of the wiper is determined by information
communicated to the device on the 3-wire port. The 3-wire
port changes the tap position by a falling edge on the
increment pin. The direction the wiper moves is determined by
the state of the up/down pin. The wiper position at power up is
Tap #15.
The X9015 can be used in a wide variety of applications that
require a digitally controlled variable resistor to set analog
values.
Features
• 32 taps
• Three-wire up/down serial interface
• VCC = 2.7V–5V
• Operating ICC = 50µA max.
• Standby current = 1µA max.
• RTOTAL = 10kΩ, 50kΩ
• Packages 8 Ld SOIC, 8 Ld MSOP
• Pb-free plus anneal available (RoHS compliant)
Pinout
SOIC/MSOP
INC
U/D
RH/VH
VSS
1
2
X9015
3
4
8
7
6
5
VCC
CS
RL/VL
RW/VW
Block Diagram
www.DataSheet4U.com
VCC (Supply Voltage)
Up/Down
(U/D)
Increment
(INC)
Device Select
(CS)
Control
VSS (Ground)
General
U/D
INC
CS
RH/VH
RW/VW
RL/VL
VCC
VSS
5-Bit
Up/Down
Counter
Control
Circuitry
31
30
29
One 28
of
Thirty
Two
Decoder
2
1
0
Transfer
Gates
Resistor
Array
Detailed
RH/VH
RL/VL
RW/VW
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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X9015
Ordering Information
PART NUMBER
X9015WS8T1
PART MARKING
X9015W
VCC LIMITS (V)
5 ±10%
RTOTAL (kΩ)
10
TEMPERATURE
RANGE (°C)
PACKAGE
0 to +70
8 Ld SOIC
Tape and Reel
PKG.
DWG. #
M8.15
X9015WS8ZT1 (Note) X9015W Z
X9015UM8
X9015UM8Z (Note)
X9015UM8I*
X9015UM8IZ* (Note)
ABB
DCF
ABD
DCD
0 to +70
8 Ld SOIC (Pb-free)
Tape and Reel
M8.15
50
0 to +70
8 Ld MSOP
M8.118
0 to +70
8 Ld MSOP (Pb-free) M8.118
-40 to +85 8 Ld MSOP
M8.118
-40 to +85 8 Ld MSOP (Pb-free) M8.118
X9015US8*
X9015U
X9015US8Z* (Note)
X9015U Z
X9015US8I*
X9015U I
X9015US8IZ* (Note)
X9015U Z I
X9015WS8-2.7*
X9015W F
X9015WS8Z-2.7* (Note) X9015W ZF
X9015UM8-2.7*
ABC
X9015UM8Z-2.7* (Note) DCF
X9015UM8I-2.7*
ABE
X9015UM8IZ-2.7* (Note) DCE
X9015US8-2.7*
X9015U F
2.7-5.5
0 to +70
8 Ld SOIC
M8.15
0 to +70
8 Ld SOIC (Pb-free) M8.15
-40 to +85 8 Ld SOIC
M8.15
-40 to +85 8 Ld SOIC (Pb-free) M8.15
10
0 to +70
8 Ld SOIC
M8.15
0 to +70
8 Ld SOIC (Pb-free) M8.15
50
0 to +70
8 Ld MSOP
M8.118
0 to +70
8 Ld MSOP (Pb-free) M8.118
-40 to +85 8 Ld MSOP
M8.118
-40 to +85 8 Ld MSOP (Pb-free) M8.118
0 to +70
8 Ld SOIC
M8.15
X9015US8Z-2.7* (Note) X9015U ZF
0 to +70
8 Ld SOIC (Pb-free) M8.15
X9015US8I-2.7*
X9015U G
-40 to +85 8 Ld SOIC
M8.15
X9015US8IZ-2.7* (Note) X9015U ZG
-40 to +85 8 Ld SOIC (Pb-free) M8.15
* Add “T1” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2 FN8157.5
August 31, 2006

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X9015
Pin Descriptions
RH/VH and RL/VL
The high (RH/VH) and low (RL/VL) terminals of the X9015 are
equivalent to the fixed terminals of a mechanical
potentiometer. The minimum voltage is VSS and the
maximum is VCC. The terminology of RL/VL and RH/VH
references the relative position of the terminal in relation to
wiper movement direction selected by the U/D input, and not
the voltage potential on the terminal.
RW/VW
RW/Vw is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the control inputs.
The wiper terminal series resistance is typically 200Ω at
VCC=5V. At power up the wiper position is at Tap #15.
(VL/RL=Tap #0).
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the tap position is incremented or decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the U/D
input.
Chip Select (CS)
The device is selected when the CS input is LOW. When CS
is returned HIGH while the INC input is also HIGH the X9015
will be placed in the low power standby mode until the device
is selected once again.
Pin Names
SYMBOL
RH/VH
RW/VW
RL/VL
VSS
VCC
U/D
INC
CS
DESCRIPTION
High terminal
Wiper terminal
Low terminal
Ground
Supply voltage
Up/Down control input
Increment control input
Chip select control input
Principles Of Operation
There are two sections of the X9015: the input control,
counter and decode section; and the resistor array. The input
control section operates just like an up/down counter. The
output of this counter is decoded to turn on a single electronic
switch connecting a point on the resistor array to the wiper
output. The resistor array is comprised of 31 individual
resistors connected in series.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions. If
the wiper is moved several positions, multiple taps are
connected to the wiper for tIW (INC to VW change). The
RTOTAL value for the device can temporarily be reduced by a
significant amount if the wiper is moved several positions.
When the device is powered-down, the wiper position is lost.
When power is restored, the wiper is set to Tap #15.
Instructions and Programming
The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS set LOW the device is
selected and enabled to respond to the U/D and INC inputs.
HIGH to LOW transitions on INC will increment or decrement
(depending on the state of the U/D input) a five bit counter.
The output of this counter is decoded to select one of thirty
two wiper positions along the resistive array.
The system may select the X9015, move the wiper and
deselect the device. The new wiper position will be maintained
until changed by the system or until a power-up/down cycle.
The state of U/D may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the wiper up and down until the proper trim is attained.
Mode Selection
CS INC U/D
LH
LL
HX
HXX
LLX
LH
LL
MODE
Wiper up
Wiper down
Standby mode
Standby mode
Normal mode
Wiper Up (not recommended)
Wiper Down (not recommend-
ed)
3 FN8157.5
August 31, 2006

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X9015
Absolute Maximum Ratings
Temperature under bias . . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on CS, INC, U/D, VH, VL and
VCC with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V
ΔV = |VH–VL| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V
Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . . +300°C
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±7.5mA
Operating Conditions
Temperature Range
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage (VCC)
X9015. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±10%
X9015-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
)
Potentiometer Specifications Over recommended operating conditions unless otherwise stated
SYMBOL
PARAMETER
TEST CONDITIONS/NOTES
RTOTAL
VVH
VVL
RW
RW
IW
End to End Resistance Variation
VH/RH Terminal Voltage
VL/RL Terminal Voltage
Power Rating
Wiper Resistance
Wiper Resistance
Wiper Current
Noise
RTOTAL 1kΩ
IW = 1mA, VCC = 5V
IW = 1mA, VCC = 2.7V
Ref: 1kHz
Resolution
Absolute Linearity (Note 1)
Relative Linearity (Note 2)
RTOTAL Temperature Coefficient
Ratiometric Temperature Coefficient
Vw(n)(actual)–Vw(n)(expected)
Vw(n+1)–[Vw(n)+MI]
CH/CL/CW Potentiometer Capacitances
See circuit #3
MIN.
–20
0
0
-3.75
-1
-0.2
TYP.
200
400
-120
3
±300
10/10/25
MAX.
UNIT
+20 %
VCC
VCC
10
V
V
mW
400 Ω
1000
Ω
3.75 mA
dBV
%
+1 MI (Note 3)
+0.2 MI (Note 3)
ppm/°C
±20 ppm/°C
pF
Power Up and Down Requirements
The are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins
provided that VCC is always more positive than or equal to VH, VL, and VW, i.e., VCC VH, VL, VW. The VCC ramp rate spec is
always in effect.
NOTES:
1. Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage = (Vw(n)(actual)–Vw(n)(expected)) = ±1 Ml Maximum.
2. Relative Linearity is a measure of the error in step size between
taps = VW(n+1) – [Vw(n) + Ml] = ±0.2 Ml.
3. 1 Ml = Minimum Increment = RTOT/31.
4. Typical values are for TA = +25°C and nominal supply voltage.
5. This parameter is periodically sampled and not 100% tested.
4 FN8157.5
August 31, 2006

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X9015
)
D.C. Operating Specifications Over recommended operating conditions unless otherwise specified
SYMBOL
ICC1
PARAMETER
VCC active current (increment)
ICC2
ISB
VCC active current (Store) (EEPROM
Store)
Standby supply current
ILI CS, INC, U/D input leakage current
VIH CS, INC, U/D input HIGH voltage
VIL CS, INC, U/D input LOW voltage
CIN (Note 5) CS, INC, U/D input capacitance
TEST CONDITIONS
CS = VIL, U/D = VIL or VIH and
INC = 0.4V @ max. tCYC
CS = VIH, U/D = VIL or VIH and
INC = VIH @ max. tWR
CS = VCC – 0.3V, U/D and
INC = VSS or VCC – 0.3V
VIN = VSS to VCC
VCC = 5V, VIN = VSS, TA = 25°C,
f = 1MHz
MIN.
VCC x 0.7
-0.5
TYP.
(Note 4)
MAX.
50
400
1
±10
VCC + 0.5
VCC x 0.1
10
UNITS
µA
µA
µA
µA
V
V
pF
TEST CIRCUIT #1
TEST CIRCUIT #2
VH/RH
VS Test Point
VW/RW
VL/RL
VH/RH
Test Point
VWW/RW
Force
VVLL/RL
Current
Symbol Table
WAVEFORM
INPUTS
Must be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
OUTPUTS
Will be
steady
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
Center Line
is High
Impedance
A.C. Conditions of Test
Input pulse levels
Input rise and fall times
Input reference levels
0V to 3V
10ns
1.5V
CIRCUIT #3 SPICE MACRO MODEL
RTOTAL
RH RL
CH
CW CL
10pF
10pF
25pF
RW
5 FN8157.5
August 31, 2006