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VR11.1, VR12 Compatible Synchronous Rectified Buck
MOSFET Driver
ISL6627
The ISL6627 is a high frequency MOSFET driver designed to drive
upper and lower power N-Channel MOSFETs in a synchronous
rectified buck converter topology. The advanced PWM protocol of
ISL6627 is specifically designed to work with Intersil VR11.1,
VR12 controllers and combined with N-Channel MOSFETs to form
a complete core-voltage regulator solution for advanced
microprocessors. When ISL6627 detects a PSI protocol sent by
an Intersil VR11.1, VR12 controller, it activates Diode Emulation
(DE) operation; otherwise, it operates in normal Continuous
Conduction Mode (CCM) PWM mode.
To further enhance light load efficiency, the ISL6627 enables
diode emulation operation during PSI mode. This allows
Discontinuous Conduction Mode (DCM) by detecting when the
inductor current reaches zero and subsequently turning off the
low side MOSFET to prevent it from sinking current.
When ISL6627 detects Diode Braking command from the PWM,
it turns off both gates and reduces overshoot in load transient
situations.
An advanced adaptive shoot-through protection is integrated to
prevent both the upper and lower MOSFETs from conducting
simultaneously and to minimize dead time. The user also has the
option to program the driver working in fixed propagation delay
mode to optimize the regulator efficiency. The ISL6627 has a
20kintegrated high-side gate-to-source resistor to prevent self
turn-on due to high input bus dV/dt.
Related Literature
• Technical Brief TB363 “Guidelines for Handling and Processing
Moisture Sensitive Surface Mount Devices (SMDs)”
• Technical Brief TB417 “Designing Stable Compensation
Networks for Single Phase Voltage Mode Buck Regulators”
Features
• Intersil VR11.1 and VR12 Compatible
• Dual MOSFET Driver for Synchronous Rectified Bridge
• Advanced Adaptive Zero Shoot-through Protection
• Programmable Fixed Deadtime for Efficiency Optimization
• Low Standby Bias Current
• 36V Internal Bootstrap Diode
• Bootstrap Capacitor Overcharge Prevention
• Supports High Switching Frequency
- 4A Sinking Current Capability
- Fast Rise/Fall Times and Low Propagation Delays
• Integrated High-Side Gate-to-Source Resistor to Prevent Self
Turn-on Due to High Input Bus dV/dt
• Power Rails Undervoltage Protection
• Expandable Bottom Copper Pad for Enhanced Heat Sinking
• Dual Flat 10 Ld (3x3 DFN) Package
- Near Chip-Scale Package Footprint; Improves PCB Efficiency
and Thinner in Profile
• Pb-Free (RoHS Compliant)
Applications
• High Light Load Efficiency Voltage Regulators
• Core Regulators for Advanced Microprocessors
• High Current DC/DC Converters
• High Frequency and High Efficiency VRM and VRD
January 24, 2014
FN6992.1
TD
VCC
EN
PWM
1
BOOT
UGATE
+5V
33.6k
POR/
CONTROL
LOGIC
SHOOT-
THROUGH
PROTECTION/
DELAY
PROGRAMMING
20k
PHASE
28.8k
LGATE
GND
FIGURE 1. ISL6627 BLOCK DIAGRAM
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2011, 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

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Typical Application Circuit
ISL6627
+5V
VTT
SVDATA
SVALERT#
SVCLK
VR_RDY
VR_RDYS
VR_HOT#
VINF
DVC FB
PSICOMP
HFCOMP
COMP VCC PWM1
ISEN1-
ISEN1+
VSEN
RGND
EN_VTT
PWM2
ISEN2-
ISEN2+
ISL6367
VINF
EN_PWR_CFP
CFP
+5V
+5V
+5V
RAMP_ADJ
IMON
IMONS
FS_DRP
FSS_DRPS
PWM6
ISEN6-
ISEN6+
ISENIN-
ISENIN+
BTS_DES_TCOMPS
BT_FDVID_TCOMP
GND
+5V
+5V
ADDR_IMAXS_TMAX
NPSI_DE_IMAX
PWMS
ISENS-
ISENS+
+5V
NTC
NTC
TMS
TM
AUTO
RGNDS
VSENS
HFCOMPS/DVCS
RSET COMPS FBS
+5V
EN
VCC
PWM
BOOT
ISL6627
DRIVER
UGATE
PHASE
GND
LGATE
+5V
EN
VCC
PWM
BOOT
ISL6627
DRIVER
UGATE
PHASE
GND
LGATE
PWM3-5
ISEN3-5-
ISEN3-5+
I2CLK
PMALERT#
I2DATA +5V
VCTRL
VCC
PWM
BOOT
ISL6596
DRIVER
UGATE
PHASE
GND
LGATE
VINF
VINF
VINF
RISENIN1
RISENIN2
VIN
RSENIN
VINF
+5V
EN
VCC
PWM
BOOT
ISL6627
DRIVER
UGATE
PHASE
GND
LGATE
NTC: BETA = 3477
2
CPU
LOAD
GPU
LOAD
FN6992.1
January 24, 2014

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Pin Configuration
ISL6627
ISL6627
(10 LD 3x3 DFN)
TOP VIEW
UGATE 1
BOOT 2
TD 3
PWM 4
GND 5
PAD
(GND)
10 PHASE
9 EN
8 NC
7 VCC
6 LGATE
Functional Pin Descriptions
PIN #
1
2
3
4
5
6
7
8
9
10
-
SYMBOL
DESCRIPTION
UGATE Upper gate drive output. Connect to gate of high-side power N-Channel MOSFET.
BOOT
Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and the PHASE pin. The
bootstrap capacitor provides the charge to turn on the upper MOSFET. See “Internal Bootstrap Device” on page 7 for guidance in
choosing the capacitor value.
TD Deadtime programming pin. Connect to ground or VCC via resistor to program fixed time delay from LGATE fall to UGATE rise or UGATE
fall to LGATE rise. Open pin sets the adaptive mode. See Table 1 for more details.
PWM Control input for the driver. The PWM signal can enter three distinct states during operation; see “Advanced PWM Protocol (Patent
Pending)” on page 6 for further details. Connect this pin to the PWM output of the controller.
GND Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the driver.
LGATE Lower gate drive output. Connect to gate of the low-side power N-Channel MOSFET.
VCC Connect to 5V bias supply. This pin supplies power to the gate drives and small-signal circuitry. Place a high quality low ESR ceramic
capacitor from this pin to GND.
NC No connection.
EN Enable input pin. Connect this pin high to enable the driver and low to disable the driver.
PHASE Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET. This pin provides a return path for the
upper gate drive.
PAD EPAD at ground potential. Soldering it directly to GND plane is required for thermal considerations.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL6627CRZ
6627
0 to +70
10 Ld 3x3 DFN
L10.3X3
ISL6627IRZ
627I
-40 to +85
10 Ld 3x3 DFN
L10.3X3
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6627. For more information on MSL please see techbrief TB363.
3 FN6992.1
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ISL6627
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input Voltage (VEN, VPWM). . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
BOOT Voltage (VBOOT-GND) . . . . . . . . . . -0.3V to 25V (DC) or 36V (<200ns)
BOOT to PHASE Voltage (VBOOT-PHASE) . . . . . . . . . . . . . . . . -0.3V to 7V (DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 9V (<10ns)
PHASE Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 25V (DC)
. . . . . . . . . . . . . . . GND -8V (<20ns Pulse Width, 10µJ) to 30V (<100ns)
UGATE Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . VPHASE - 0.3V (DC) to VBOOT
. . . . . . . . . . . . . . . . . . .VPHASE - 5V (<20ns Pulse Width, 10µJ) to VBOOT
LGATE Voltage . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V (DC) to VCC + 0.3V
. . . . . . . . . . . . . . . . GND - 2.5V (<20ns Pulse Width, 5µJ) to VCC + 0.3V
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5kV
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1kV
Latch Up (Tested per JESD78C; Class II, Level A) . . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance
θJA (°C/W) θJC (°C/W)
10 Ld 3x3 DFN Package (Notes 4, 5). . . . .
51
10
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . .+150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range(ISL6627IRZ) . . . . . . . . . . . . -40°C to +85°C
Ambient Temperature Range (ISL6627CRZ) . . . . . . . . . . . . .0°C to +70°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . . +125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ±10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Boldface limits apply over the operating
temperature range.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN MAX
(Note 7) TYP (Note 7) UNITS
VCC SUPPLY CURRENT
No Load Switching Supply Current
IVCC
f_PWM = 300kHz, VCC = 5V, EN = High
1.27
mA
Standby Supply Current
IVCC VCC = 5V, PWM 0V to 2.5V transition, EN = High
1.85
mA
VCC = 5V, PWM 0V to 2.5V transition, EN = Low
1.15
mA
POWER-ON RESET AND ENABLE
VCC Rising POR Threshold
3.20 3.85 4.40
V
VCC Falling POR Threshold
3.00 3.52 4.00
V
VCC POR Hysteresis
130 300 530 mV
EN High Threshold
1.40 1.65 1.90
V
EN Low Threshold
1.20 1.35 1.55
V
PWM INPUT (See “TIMING DIAGRAM” on page 6)
Input Current
IPWM VPWM = 5V
155 µA
VPWM = 0V
-133
µA
Three-State Lower Gate Falling Threshold
VCC = 5V
1.6 V
Three-State Lower Gate Rising Threshold
VCC = 5V
1.1 V
Three-State Upper Gate Rising Threshold
VCC = 5V
3.2 V
Three-state Upper Gate Falling Threshold
VCC = 5V
2.8 V
UGATE Rise Time (Note 6)
t_RU
VCC = 5V, 3nF load, 10% to 90%
8 ns
LGATE Rise Time (Note 6)
t_RL
VCC = 5V, 3nF load, 10% to 90%
8 ns
UGATE Fall Time (Note 6)
t_FU VCC = 5V, 3nF load, 10% to 90%
8 ns
LGATE Fall Time (Note 6)
UGATE Turn-On Propagation Delay (Note 6)
LGATE Turn-On Propagation Delay (Note 6)
UGATE Turn-Off Propagation Delay (Note 6)
tFL
tPDHU
tPDHL
tPDLU
VCC = 5V, 3nF load, 10% to 90%
VCC = 5V, 3nF load, adaptive
VCC = 5V, 3nF load, adaptive
VCC = 5V, 3nF load
4 ns
28 ns
16 ns
15 ns
4 FN6992.1
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ISL6627
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Boldface limits apply over the operating
temperature range. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN MAX
(Note 7) TYP (Note 7) UNITS
LGATE Turn-Off Propagation Delay (Note 6)
Minimum LGATE on Time at Diode Emulation
PROPAGATION DELAY PROGRAMMING
tPDLL
tLG_ON_DM
VCC = 5V, 3nF load
VCC = 5V
14
230 330 450
ns
ns
UGATE Fall to LGATE Rise Time
tPDUFLR
VCC = 5V, 3nF Load, 90% to 10%,
short resistor from TD to VCC
23 ns
VCC = 5V, 3nF Load, 90% to 10%, 100kresistor from
TD to VCC
18
ns
VCC = 5V, 3nF Load, 90% to 10%, 330kresistor from
TD to VCC
15
ns
VCC = 5V, 3nF Load, 90% to 10%, 910kresistor from
TD to VCC
7
ns
VCC = 5V, 3nF Load, 90% to 10%,
short resistor from TD to GND
18 ns
LGATE Fall to UGATE Rise Time
tPDLFUR
VCC = 5V, 3nF Load, 90% to 10%,
short resistor from TD to GND
40 ns
VCC = 5V, 3nF Load, 90% to 10%, 100kresistor from
TD to GND
25
ns
VCC = 5V, 3nF Load, 90% to 10%, 360kresistor from
TD to GND
17
ns
VCC = 5V, 3nF Load, 90% to 10%,
short resistor from TD to VCC
27 ns
OUTPUT (Note 6)
Upper Drive Source Current
I_U_SOURCE VCC = 5V, 3nF load
2A
Upper Drive Source Impedance
R_U_SOURCE 20mA source current
1
Upper Drive Sink Current
I_U_SINK VCC = 5V, 3nF load
2A
Upper Drive Sink Impedance
R_U_SINK 20mA sink current
1
Lower Drive Source Current
I_L_SOURCE VCC = 5V, 3nF load
2A
Lower Drive Source Impedance
R_L_SOURCE 20mA source current
1
Lower Drive Sink Current
I_L_SINK VCC = 5V, 3nF load
4A
Lower Drive Sink Impedance
R_L_SINK 20mA sink current
0.4
NOTES:
6. Limits established by characterization and are not production tested.
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
5 FN6992.1
January 24, 2014