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8XC51SL LOW VOLTAGE 8XC51SL
KEYBOARD CONTROLLER
80C51SL CPU with RAM and I O VCC e 5V g10%
81C51SL 16K ROM Preprogrammed with SystemSoft Keyboard Controller and Scanner
Firmware VCC e 5V g10%
83C51SL 16K Factory Programmed ROM VCC e 5V g10%
87C51SL 16K OTP ROM VCC e 5V g10%
Low Voltage 80C51SL CPU with RAM and I O VCC e 3 3V g0 3V
Low Voltage 81C51SL 16K ROM Preprogrammed with SystemSoft Keyboard Controller
and Scanner Firmware VCC e 3 3V g0 3V
Low Voltage 83C51SL 16K Factory Programmed ROM VCC e 3 3V g0 3V
Low Voltage 87C51SL 16K OTP ROM VCC e 3 3V g0 3V
Y Proliferation of 8051 Architecture
Y Complete 8042 Keyboard Control
Functionality
Y 8042 Style Host Interface
Y Optional Hardware Speedup of
GATEA20 and RCL
Y Local 16 x 8 Keyboard Switch Matrix
Support
Y Two Industry Standard Serial Keyboard
Interfaces Supported via Four High
Drive Outputs
Y 5 LED Drivers
Y Low Power CHMOS Technology
Y 4-Channel 8-Bit A D
Y Interface for up to 32 Kbytes of
External Memory
Y Slew Rate Controlled I O Buffers Used
to Minimize Noise
Y 256 Bytes Data RAM
Y Three Multifunction I O Ports
Y 10 Interrupt Sources with 6 User-
Definable External Interrupts
Y 2 MHz – 16 MHz Clock Frequency
Y 100-Pin PQFP (8XC51SL)
100-Pin SQFP (Low Voltage 8XC51SL)
The 8XC51SL based on Intel’s industry-standard MCS 51 microcontroller family is designed for keyboard
control in laptop and notebook PCs The highly integrated keyboard controller incorporates an 8042-style UPI
host interface with expanded memory keyboard scan and power management The 8XC51SL supports both
serial and scanned keyboard interfaces and is available in pre-programmed versions to reduce time to market
The Low Voltage 8XC51SL is the 3 3V version optimized for even further power savings Throughout the
remainder of this document both devices will generally be referred to as 51SL
The 8XC51SL is a pin-for-pin compatible replacement for the 8XC51SL-BG It does however have some
additional functionality Those additional functions are as follows
1 16K OTP ROM The 8XC51SL-BG had only 8K of ROM
2 New Register Set The 8XC51SL adds a second set of host interface registers available for use in support-
ing power management This required an additional address line (A1) for decoding To accommodate this
one VCC pin was removed However in order to maintain compatibility with the -BG version an enable bit
for this new register set was added in configuration register 1 This allows the 8XC51SL to be drop in
compatible to existing 8XC51SL-BG designs no software modifications required
NOTE
The changes made to the VCC pins require that all three VCC pins be properly connected Failing to do so
could result in high leakage current and possible damage to the device
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
November 1994
Order Number 272271-002

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8XC51SL LOW VOLTAGE 8XC51SL
Figure 1 Block Diagram
272271 – 1
2

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8XC51SL LOW VOLTAGE 8XC51SL
Figure 2 Connection Diagram (PQFP and SQFP)
PACKAGES
Part
8XC51SL
Low Voltage 8XC51SL
Prefix
KU
SB
Suffix
AH
AL
Package Type
100-Pin PQFP
100-Pin SQFP
272271 – 2
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8XC51SL LOW VOLTAGE 8XC51SL
PIN DESCRIPTIONS
Table 1 Pin Descriptions
Symbol
Type
Description
VSS Circuit ground potential
VCC Supply voltage during normal Idle and Power-Down operation nominally a5V
g10% for 8XC51SL a3 3V g 0 3V for Low Voltage 8XC51SL
PCDB0 – 7
I O Host interface data bus An 8-bit bidirectional port for data transfers between the
host processor and the keyboard controller
WRL
I The active-low host-interface write signal
RDL
I The active-low host-interface read signal
CSL I The active-low host-interface chip select
A0 – A1
I Host-Interface Address select inputs
PCOBF
O The active-high host-interface Output Buffer Full interrupt
GATEA20
O Gate A20 control signal output
RCL PROGL
O Host reset active low This pin is also the program pulse input during EPROM
programming
LED0 – 3
O LED output drivers
KSI0 – 7
I Keyboard input scan lines (input Port 0) Schmitt inputs with 5K – 20K pull-up
resistors
KSO0 – 15
O Keyboard output scan lines
PORT 1
P10 A0–
P17 A7
I O Port 1 is a general-purpose 8-bit bidirectional port with internal pull-ups It also
supports the following user-selectable functions
P10–P16 are available for connection to dedicated keyboard inputs A0 – A7 output
the low-order address byte (refer to LOADREN signal)
LOADREN
I Low address enable When set high address bits A0 – A7 are output on P10 – P17
PORT2
I O Port 2 is a general-purpose 8-bit bidirectional port with internal pull-ups on P20 – 6
A8–14 It also supports the following user-selectable functions
P20–6 A8–14
P20–6 A8–14 output the high-order address byte
P27 LED4
P27 LED4 is available as a fifth LED output driver (by writing to the port bit 7)
PORT 3
P30 SIF00
P31 SIF01
P32 INT0
P33 SIF10
P34 T0
P35 SIF11
P36 WRL
P37 RDL
I O Port 3 is a general-purpose 8-bit bidirectional port P32 INT0 P34 T0 P36 WRL
and P37 RDL have internal pull-ups P30 SIF00 P31 SIF01 P33 SIF10 and
P35 SIF11 are high-drive open-drain outputs It also supports the following user-
selectable functions
A high-drive open-drain output to support an external serial keyboard interface
(typically CLK) RXD (8051 UART serial input port) SIF0INTL (serial interface
interrupt 0)
A high-drive open-drain output to support an external serial keyboard interface
(typically DATA) TXD (8051 UART serial output port)
INT0L (external interrupt 0)
A high-drive open-drain output to support an external serial keyboard interface
(typically mouse CLK) SIF1INTL (external interrupt 1)
AUXOBF1 (output buffer full mouse support) T0 (Timer Counter 0 external
input)
A high-drive open-drain output to support an external serial keyboard interface
(typically mouse DATA) T1 (Timer Counter 1 external input)
WRL (external data memory write strobe) inactive at addresses 7FF0 – 7FFFH
AUXOBF2 (output buffer full interrupt) INT2L (external interrupt) RDL (external
data memory read strobe) inactive at addresses 7FF0 – FFFFH
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8XC51SL LOW VOLTAGE 8XC51SL
PIN DESCRIPTIONS (Continued)
Table 1 Pin Descriptions (Continued)
Symbol Type
Description
XTAL1
I Input to the on-chip oscillator
XTAL2
O Output from the on-chip oscillator
AVGND
Analog ground potential
AVREF
Analog supply voltage nominally a5V g10% for 8XC51SL a3 3V g0 3V for Low
Voltage 8XC51SL
AIN0 – 3
I A D Analog input channels
ADB0–7 I O External address data bus Multiplexes the low-address byte and data during external
memory accesses
EAL VPP I External address input When held high the 51SL CPU executes out of internal Program
Memory unless the program counter exceeds 3FFFH When held low the 51SL CPU
always executes out of external memory EAL is latched on the falling edge of RST This
pin also receives the programming supply voltage (VPP) during EPROM programming
ALE O Address Latch Enable output pulse latches the low address byte during external
memory access ALE is output at a constant rate of the oscillator frequency whether
or not there are accesses to external memory One ALE pulse is skipped during the
execution of a MOVX instruction ALE is disabled during Idle mode and can also be
disabled via Configuration register 1 control
PSENL
O Program Store Enable is the read strobe to external program memory PSENL is
qualified with RDL and A15 for use with an external Flash memory PSENL is not active
when the device executes out of internal program memory
MEMCSL I O External Memory Chip Select for code space address 4000H and above when EAL is
inactive (i e high) For EAL low MEMCSL is active Goes inactive during Idle mode and
Power-Down mode If external memory interfacing is not required MEMCSL can be
configured as a general purpose I O (controlled via Configuration register 1)
RST
I Resets the keyboard controller Hold RST high for two machine cycles
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